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Split-Gate CSTBT™ for Suppression of Negative Gate Capacitance Under Short Circuit
CSTBT™ can reduce on-state voltage drop (\mathrm{V}_{\text{CEsat}}) by storing carriers. On the other hand, storing carriers causes flow of displacement current (\mathrm{I}_{\text{dis}}) into the gate, resulting in the overshoot of the gate-emitter voltage (V GE ). The phenomenon of IGBTs is express...
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Main Authors: | , , , , |
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Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
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Summary: | CSTBT™ can reduce on-state voltage drop (\mathrm{V}_{\text{CEsat}}) by storing carriers. On the other hand, storing carriers causes flow of displacement current (\mathrm{I}_{\text{dis}}) into the gate, resulting in the overshoot of the gate-emitter voltage (V GE ). The phenomenon of IGBTs is expressed as a negative gate capacitance. In this study, we have found a solution to suppress the negative gate capacitance for \text{CSTBT}^{\text{TM}} , enabling the reduction in \mathrm{V}_{\text{CEsat}} by using a split-gate structure. Additionally, we have clarified the mechanism through a combination of measurements and device simulations. As a result, the split-gate achieved 76% reduction in integral of \mathrm{I}_{\text{dis}} at the same \mathrm{V}_{\text{CEsat}} compared to the conventional structure. This is because most of the \mathrm{I}_{\text{dis}} flowing to lower split gate is directed towards the emitter. |
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ISSN: | 1946-0201 |
DOI: | 10.1109/ISPSD59661.2024.10579627 |