X-Band 16-Channel Transmit-Receive Plank Unit for High-Resolution Imaging RADAR

• Published in: IEEE access 2024, Vol.12, p.139456-139468
• Main Authors: Sreenivasulu, K., Prasan Ray, Kamla, Srinivasa Rao, D., Kumar, Pramod, Vengadarajan, A.
• Format: Article
• Language: English
• Subjects: Active electronically scanned array (AESA); CMOS technology; commercially off-the-shelf (COTS); complementary metal oxide (CMOS); Delay effects; effective isotropic radiated power (EIRP); field programmable gate array (FPGA); Field programmable gate arrays; gallium arsenide (GaAs); gallium nitride (GaN); low voltage differential signal (LVDS); MMICs; monolithic microwave integrated circuit (MMIC); Phase shifters; printed circuit board (PCB); Radar imaging; Radio frequency; single pole double throw (SPDT) switch; Transmission line measurements; transmit-receive channel (TRC); true-time-delay (TTD) line; Wideband
• ISSN: 2169-3536; 2169-3536
• DOI: 10.1109/ACCESS.2024.3452645

This article presents a comprehensive design framework and realization approach for a state-of-the-art, X-band 16-channel Transmit-Receive (TR) plank unit for high-resolution imaging radar applications. The Transmit-Receive Module (TRM) is the most critical component of Active Electronically Scanned Arrays (AESA), which are widely used in Radar, Electronic Warfare (EW), and Communication systems. Modern AESAs with wide instantaneous bandwidth are utilized in imaging, and high data rate communication systems require time delay lines instead of narrowband phase shifters for squint-free beam scanning over a large scan volume. The design of a compact time delay line-based TRM that fits within the inter-element spacing of AESA is quite challenging. This paper presents a novel design of a true-time-delay (TTD) line-based 16-TR Channel (TRC) plank unit as a basic building block for X-band AESA-based high-resolution Imaging Radar. A novel architecture of distributed time delay network is proposed to offer a maximum time delay of 600 ps in steps of 3.125 ps per TRC by using 6-bit TTD line core chips at the plank unit level and overall 1.4ns maximum delay at AESA level. The proposed plank unit is realized by using a multi-layer, multi-laminate printed circuit board (PCB) technology with surface-mount microwave and digital components. Automated surface mount assembly and automated test facilities are utilized to develop plank units with high repeatability and reliability. The 16-TRC plank PCB is housed in a single mechanical enclosure along with blind mate connectors for RF, digital, and power supply interfaces. Two such plank units are mounted back to back on a single liquid cold plate for efficient thermal management. This paper details the design challenges associated with packaging and thermal management of multi-TR Channel plank units in a compact size of 300\times 200 x 8 mm3 along with RF path analysis, circuit simulation, PCB design, and proto plank unit performance characterization. The designed plank unit has demonstrated 10 Watt peak transmit output power, receive noise figure of 4 dB per TRC, and channel-to-channel isolation of 40 dB over 2 GHz bandwidth.