Hybrid Stochastic Computing of Linear Time O(N) and Its In-Memory Computing for High Performances

Stochastic computing (SC) reduces the complexity of arithmetic circuits but brings extra conversion cost and time complexity of \mathbf{O}(\mathbf{2}^{N}) , which leads to a much lower efficiency than binary. This paper proposes a linear-time, O(N), and conversion-free hybrid stochastic computing (H...

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Bibliographic Details
Main Authors: Chen, Yuhao, Li, Hongge, Song, Yinjie, Zhu, Xinyu
Format: Conference Proceeding
Language:English
Subjects:
Accuracy
Complexity theory
Computing in memory
Costs
Energy efficiency
High performance
Hybrid stochastic computing
In-memory computing
Linear time complexity
Stochastic systems
Very large scale integration
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Summary:Stochastic computing (SC) reduces the complexity of arithmetic circuits but brings extra conversion cost and time complexity of \mathbf{O}(\mathbf{2}^{N}) , which leads to a much lower efficiency than binary. This paper proposes a linear-time, O(N), and conversion-free hybrid stochastic computing (HSC). Moreover, a hybrid stochastic computing in-memory method is proposed, mapping addition and multiplication of HSC into memory's enable and addressing circuits. Thus, the basic memory having enable and addressing circuits can realize HSC operation without additional circuits. The experiment shows that HSC in block memory (BRAM) based on FPGA for matrix multiplication reaches 2.304 TOPS (operation per second) and 17.2 TOPS/W.bit. Each 18K-BRAM provides 18 GOPS (INT8) with 8.34 mW at 600 MHz.
ISSN:2159-3477
DOI:10.1109/ISVLSI61997.2024.00146