Loading…
E3HDC: Energy Efficient Encoding for Hyper-Dimensional Computing on Edge Devices
Hyper-Dimensional Computing (HDC) as a brain-inspired computational model for cognitive tasks is suitable for edge devices due to its hardware-friendly and fault-resistant computations. Despite this potential, HDC has a large memory footprint, resulting high power consumption. In this work, we propo...
Saved in:
| Main Authors: | , , , |
|---|---|
| Format: | Conference Proceeding |
| Language: | English |
| Subjects: | |
| Online Access: | Request full text |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| cited_by | |
|---|---|
| cites | |
| container_end_page | 280 |
| container_issue | |
| container_start_page | 274 |
| container_title | |
| container_volume | |
| creator | Roodsari, Mahboobe Sadeghipour Krautter, Jonas Meyers, Vincent Tahoori, Mehdi |
| description | Hyper-Dimensional Computing (HDC) as a brain-inspired computational model for cognitive tasks is suitable for edge devices due to its hardware-friendly and fault-resistant computations. Despite this potential, HDC has a large memory footprint, resulting high power consumption. In this work, we propose a hardware-aware encoding where parameters are generated on-the-fly without any large memory block requirements. Moreover, the hardware mapping of the trained HDC model is optimized to make it suitable for resource-constraint edge devices. In this work we propose an end-to-end flow from HDC training to FPGA mapping. We demonstrate the efficiency of this method compared to other state-of-the-art HDC implementations in terms of hardware usage and power consumption. |
| doi_str_mv | 10.1109/FPL64840.2024.00045 |
| format | conference_proceeding |
| fullrecord | <record><control><sourceid>ieee_CHZPO</sourceid><recordid>TN_cdi_ieee_primary_10705518</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>10705518</ieee_id><sourcerecordid>10705518</sourcerecordid><originalsourceid>FETCH-LOGICAL-i106t-8e0ede5c906902b97b2b0b3351212367dc8c7ee93b93eb5eb173aa29763d9c733</originalsourceid><addsrcrecordid>eNotjM1Kw0AURkdBsNQ-gS7mBVLvzJ1fd5KmRgjYha5LZnJTRtqkJFHI21vR1QfnHD7G7gWshQD_uN1VRjkFawlSrQFA6Su28tY7RKERwOprthBemUwo527Zahw_LxloZZ02C7YrsNzkT7zoaDjMvGjbFBN10wXEvkndgbf9wMv5TEO2SSfqxtR39ZHn_en8Nf36vuNFcyC-oe8UabxjN219HGn1v0v2sS3e8zKr3l5e8-cqSwLMlDkCakhHD8aDDN4GGSAgaiGFRGOb6KIl8hg8UtAUhMW6lt4abHy0iEv28PebiGh_HtKpHua9AAtaC4c_tRFO6w</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>E3HDC: Energy Efficient Encoding for Hyper-Dimensional Computing on Edge Devices</title><source>IEEE Xplore All Conference Series</source><creator>Roodsari, Mahboobe Sadeghipour ; Krautter, Jonas ; Meyers, Vincent ; Tahoori, Mehdi</creator><creatorcontrib>Roodsari, Mahboobe Sadeghipour ; Krautter, Jonas ; Meyers, Vincent ; Tahoori, Mehdi</creatorcontrib><description>Hyper-Dimensional Computing (HDC) as a brain-inspired computational model for cognitive tasks is suitable for edge devices due to its hardware-friendly and fault-resistant computations. Despite this potential, HDC has a large memory footprint, resulting high power consumption. In this work, we propose a hardware-aware encoding where parameters are generated on-the-fly without any large memory block requirements. Moreover, the hardware mapping of the trained HDC model is optimized to make it suitable for resource-constraint edge devices. In this work we propose an end-to-end flow from HDC training to FPGA mapping. We demonstrate the efficiency of this method compared to other state-of-the-art HDC implementations in terms of hardware usage and power consumption.</description><identifier>EISSN: 1946-1488</identifier><identifier>EISBN: 9798331530075</identifier><identifier>DOI: 10.1109/FPL64840.2024.00045</identifier><identifier>CODEN: IEEPAD</identifier><language>eng</language><publisher>IEEE</publisher><subject>Accuracy ; Computational modeling ; configurable design ; edge device ; Encoding ; Energy efficiency ; Field programmable gate arrays ; Hardware ; HDC ; hyperdimensional computing ; Internet of Things ; IoT ; Logic ; low power ; Memory management ; Power demand ; Training</subject><ispartof>2024 34th International Conference on Field-Programmable Logic and Applications (FPL), 2024, p.274-280</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/10705518$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,27902,54530,54907</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/10705518$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Roodsari, Mahboobe Sadeghipour</creatorcontrib><creatorcontrib>Krautter, Jonas</creatorcontrib><creatorcontrib>Meyers, Vincent</creatorcontrib><creatorcontrib>Tahoori, Mehdi</creatorcontrib><title>E3HDC: Energy Efficient Encoding for Hyper-Dimensional Computing on Edge Devices</title><title>2024 34th International Conference on Field-Programmable Logic and Applications (FPL)</title><addtitle>FPL</addtitle><description>Hyper-Dimensional Computing (HDC) as a brain-inspired computational model for cognitive tasks is suitable for edge devices due to its hardware-friendly and fault-resistant computations. Despite this potential, HDC has a large memory footprint, resulting high power consumption. In this work, we propose a hardware-aware encoding where parameters are generated on-the-fly without any large memory block requirements. Moreover, the hardware mapping of the trained HDC model is optimized to make it suitable for resource-constraint edge devices. In this work we propose an end-to-end flow from HDC training to FPGA mapping. We demonstrate the efficiency of this method compared to other state-of-the-art HDC implementations in terms of hardware usage and power consumption.</description><subject>Accuracy</subject><subject>Computational modeling</subject><subject>configurable design</subject><subject>edge device</subject><subject>Encoding</subject><subject>Energy efficiency</subject><subject>Field programmable gate arrays</subject><subject>Hardware</subject><subject>HDC</subject><subject>hyperdimensional computing</subject><subject>Internet of Things</subject><subject>IoT</subject><subject>Logic</subject><subject>low power</subject><subject>Memory management</subject><subject>Power demand</subject><subject>Training</subject><issn>1946-1488</issn><isbn>9798331530075</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2024</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotjM1Kw0AURkdBsNQ-gS7mBVLvzJ1fd5KmRgjYha5LZnJTRtqkJFHI21vR1QfnHD7G7gWshQD_uN1VRjkFawlSrQFA6Su28tY7RKERwOprthBemUwo527Zahw_LxloZZ02C7YrsNzkT7zoaDjMvGjbFBN10wXEvkndgbf9wMv5TEO2SSfqxtR39ZHn_en8Nf36vuNFcyC-oe8UabxjN219HGn1v0v2sS3e8zKr3l5e8-cqSwLMlDkCakhHD8aDDN4GGSAgaiGFRGOb6KIl8hg8UtAUhMW6lt4abHy0iEv28PebiGh_HtKpHua9AAtaC4c_tRFO6w</recordid><startdate>20240902</startdate><enddate>20240902</enddate><creator>Roodsari, Mahboobe Sadeghipour</creator><creator>Krautter, Jonas</creator><creator>Meyers, Vincent</creator><creator>Tahoori, Mehdi</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>20240902</creationdate><title>E3HDC: Energy Efficient Encoding for Hyper-Dimensional Computing on Edge Devices</title><author>Roodsari, Mahboobe Sadeghipour ; Krautter, Jonas ; Meyers, Vincent ; Tahoori, Mehdi</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i106t-8e0ede5c906902b97b2b0b3351212367dc8c7ee93b93eb5eb173aa29763d9c733</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2024</creationdate><topic>Accuracy</topic><topic>Computational modeling</topic><topic>configurable design</topic><topic>edge device</topic><topic>Encoding</topic><topic>Energy efficiency</topic><topic>Field programmable gate arrays</topic><topic>Hardware</topic><topic>HDC</topic><topic>hyperdimensional computing</topic><topic>Internet of Things</topic><topic>IoT</topic><topic>Logic</topic><topic>low power</topic><topic>Memory management</topic><topic>Power demand</topic><topic>Training</topic><toplevel>online_resources</toplevel><creatorcontrib>Roodsari, Mahboobe Sadeghipour</creatorcontrib><creatorcontrib>Krautter, Jonas</creatorcontrib><creatorcontrib>Meyers, Vincent</creatorcontrib><creatorcontrib>Tahoori, Mehdi</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Roodsari, Mahboobe Sadeghipour</au><au>Krautter, Jonas</au><au>Meyers, Vincent</au><au>Tahoori, Mehdi</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>E3HDC: Energy Efficient Encoding for Hyper-Dimensional Computing on Edge Devices</atitle><btitle>2024 34th International Conference on Field-Programmable Logic and Applications (FPL)</btitle><stitle>FPL</stitle><date>2024-09-02</date><risdate>2024</risdate><spage>274</spage><epage>280</epage><pages>274-280</pages><eissn>1946-1488</eissn><eisbn>9798331530075</eisbn><coden>IEEPAD</coden><abstract>Hyper-Dimensional Computing (HDC) as a brain-inspired computational model for cognitive tasks is suitable for edge devices due to its hardware-friendly and fault-resistant computations. Despite this potential, HDC has a large memory footprint, resulting high power consumption. In this work, we propose a hardware-aware encoding where parameters are generated on-the-fly without any large memory block requirements. Moreover, the hardware mapping of the trained HDC model is optimized to make it suitable for resource-constraint edge devices. In this work we propose an end-to-end flow from HDC training to FPGA mapping. We demonstrate the efficiency of this method compared to other state-of-the-art HDC implementations in terms of hardware usage and power consumption.</abstract><pub>IEEE</pub><doi>10.1109/FPL64840.2024.00045</doi><tpages>7</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | EISSN: 1946-1488 |
| ispartof | 2024 34th International Conference on Field-Programmable Logic and Applications (FPL), 2024, p.274-280 |
| issn | 1946-1488 |
| language | eng |
| recordid | cdi_ieee_primary_10705518 |
| source | IEEE Xplore All Conference Series |
| subjects | Accuracy Computational modeling configurable design edge device Encoding Energy efficiency Field programmable gate arrays Hardware HDC hyperdimensional computing Internet of Things IoT Logic low power Memory management Power demand Training |
| title | E3HDC: Energy Efficient Encoding for Hyper-Dimensional Computing on Edge Devices |
| url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-31T22%3A18%3A27IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_CHZPO&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=E3HDC:%20Energy%20Efficient%20Encoding%20for%20Hyper-Dimensional%20Computing%20on%20Edge%20Devices&rft.btitle=2024%2034th%20International%20Conference%20on%20Field-Programmable%20Logic%20and%20Applications%20(FPL)&rft.au=Roodsari,%20Mahboobe%20Sadeghipour&rft.date=2024-09-02&rft.spage=274&rft.epage=280&rft.pages=274-280&rft.eissn=1946-1488&rft.coden=IEEPAD&rft_id=info:doi/10.1109/FPL64840.2024.00045&rft.eisbn=9798331530075&rft_dat=%3Cieee_CHZPO%3E10705518%3C/ieee_CHZPO%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i106t-8e0ede5c906902b97b2b0b3351212367dc8c7ee93b93eb5eb173aa29763d9c733%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=10705518&rfr_iscdi=true |