A Cryo-CMOS 64-Channel Bias Generator IC for Surface Ion Trap

A high-voltage DC bias generator chip is designed to address the scalability challenges of ion trap systems. The circuit employs a single digital-to-analog converter (DAC) to generate 64 channel outputs using time-division multiplexed driving. The chip, fabricated using 180 nm BCDMOS process, produc...

Full description

Saved in:
Bibliographic Details
Main Authors: Park, Sungbin, Song, Seokchan, Kim, Keumhyun, Lee, Hyegoo, Lee, Moonjoo, Sim, Jae-Yoon
Format: Conference Proceeding
Language:English
Subjects:
Cryo-CMOS
DAC
Electron traps
Generators
high voltage
ion trap
Ions
Multiplexing
Power system measurements
quantum computer
Qubit
Scalability
Steady-state
Surface treatment
System-on-chip
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:A high-voltage DC bias generator chip is designed to address the scalability challenges of ion trap systems. The circuit employs a single digital-to-analog converter (DAC) to generate 64 channel outputs using time-division multiplexed driving. The chip, fabricated using 180 nm BCDMOS process, produces 64 DC voltages in a range of -10V to 16V at 4 Kelvin(4K) with an 11.06 bit resolution. The chip is verified with a trap of { }^{40} \mathbf{C a}^{+} ions, showing successful operations of capturing and shuttling the ions.
ISSN:2643-1319
DOI:10.1109/ESSERC62670.2024.10719474