CTFE: A High-Efficient Heterogeneous Cryptographic CGRA for Diverse Security Applications

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems 2024-11, p.1-1
• Main Authors: Le, Vu Trung Duong, Pham, Hoai Luan, Tran, Thi Hong, Tran, Van Duy, Vu, Tuan Hai, Nakashima, Yasuhiko
• Format: Article
• Language: English
• Subjects: Blockchain; CGRA; Ciphers; Computer architecture; Cryptography; Elliptic curve cryptography; Field programmable gate arrays; FPGA; Hardware; Hash functions; Power demand; Security; Society 5.0; Throughput
• ISSN: 0278-0070; 1937-4151
• DOI: 10.1109/TCAD.2024.3490176

Nowadays, cryptographic computation across various security applications necessitates the development of hardware that is not only fast and power-efficient but also flexible enough to support a range of cryptographic algorithms. Unfortunately, existing computing platforms for cryptography struggle to balance high flexibility, high performance, and low power consumption. To address these issues, this paper introduces the Crypto-Tailored Flexible Engine (CTFE), a next-generation coarse-grained reconfigurable array (CGRA) for cryptography. Concretely, the CTFE incorporates four innovative ideas to achieve high flexibility and performance with high hardware efficiency: processing element array (PEA) with dual-buffer lanes and multiplexer optimization, high flexibility hyper ALU, heterogeneous PEA, and bi-tiered pipeline coordination. Real-time evaluation results on Xilinx ZCU102 FPGA at the system-on-chip (SoC) level demonstrate that the CTFE is 1.13-14.3 times better in throughput and 55.3-14,232 times better in energy efficiency than state-of-the-art CPUs. Experiments on an ASIC 45nm CMOS technology show that the CTFE consumes the power of 1.06 W, occupies an area of 2.77 mm2, and operates at the frequency of 510 MHz. In comparison to existing CGRA solutions, CTFE outperforms 1.63-20.23 times in throughput and 1.61-73.2 times in area efficiency.