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A Methodology to Evaluate Image Target Tracking Algorithms' Implementation in Different Hardware Architectures
Store separation flight tests are fundamental to ensure the safe separation between the store and the aircraft. However, this activity is considered high-risk, high-cost, and can take days and a large number of devices to be executed. Therefore, any reduction of time or equipment brings advantages i...
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Main Authors: | , , , |
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Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
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Summary: | Store separation flight tests are fundamental to ensure the safe separation between the store and the aircraft. However, this activity is considered high-risk, high-cost, and can take days and a large number of devices to be executed. Therefore, any reduction of time or equipment brings advantages in terms of both efficiency and cost. This paper proposes a methodology to evaluate the performance of different tracking algorithms in fixed hardware architectures, such as CPU and GPU, as well as in reconfigurable hardware architectures, i.e. FPGA. Our methodology takes into account important features such as computer performance metrics, object tracking precision and effectiveness, and flight test environment. Our proposal allows a comparison between architecture performance and effectiveness while executing the tracking algorithms with real-time constraints. |
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ISSN: | 2155-7209 |
DOI: | 10.1109/DASC62030.2024.10749072 |