Partition methodology for the final adder in a tree-structure parallel multiplier generator

In this paper, we focus on the performance optimization of the final addition stage in a tree-structure multiplier. Two novel partitioning methods for the final addition are proposed in order to fully exploit the feature of nonuniform signal arrival time at different bit positions. Simulation result...

Full description

Saved in:
Bibliographic Details
Main Authors: Tso-Bing Juang, Jeng-Hsiun Jan, Ming-Yu Tsai, Shen-Fu Hsiao
Format: Conference Proceeding
Language:English
Subjects:
Computer science
Costs
Delay effects
Digital signal processing
Flowcharts
Hardware
Optimization methods
Region 2
Region 3
Signal design
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:In this paper, we focus on the performance optimization of the final addition stage in a tree-structure multiplier. Two novel partitioning methods for the final addition are proposed in order to fully exploit the feature of nonuniform signal arrival time at different bit positions. Simulation results show that our methods have better performance compared to previous approaches.
DOI:10.1109/APCCAS.2002.1115024