A MESFET Variable-Capacitance Model for GaAs Integrated Circuit Simulation

A simple MESFET capacitance model which has a clearly explained physical meaning for a wide bias voltage range has been developed for use in simulations of GaAs integrated circuits. In this model, gate-source, gate-drain capacitances are represented by analytical expressions which are classified int...

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Bibliographic Details
Published in:IEEE transactions on microwave theory and techniques 1982-05, Vol.30 (5), p.719-724
Main Authors: Takada, T., Yokoyama, Kiyoyuki, Ida, M., Sudo, T.
Format: Article
Language:English
Subjects:
Capacitance
Equivalent circuits
FETs
Gallium arsenide
Integrated circuit modeling
Logic
MESFET circuits
MESFET integrated circuits
Space charge
Voltage
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Description
Summary:A simple MESFET capacitance model which has a clearly explained physical meaning for a wide bias voltage range has been developed for use in simulations of GaAs integrated circuits. In this model, gate-source, gate-drain capacitances are represented by analytical expressions which are classified into three different regions for bias voltages: a before-pinch-off region including the neighborhood of the built-in voltage, an after-pinch-off region, a transition region. 2-dimensional analysis results support the validity of the analytically derived capacitance model. The model is applicable to MESFET's used in integrated circuits that have low donor-thickness product.
ISSN:0018-9480
1557-9670
DOI:10.1109/TMTT.1982.1131127