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Heavy ion characterization of SEU mitigation methods for the Virtex FPGA
This work presents the results from heavy ion tests of Xilinx Virtex FPGA XQVR300 manufactured by Xilinx in a 0.25/spl mu/m technology. Virtex XQVR300 is an SRAM-based FPGA, which allows for real-time reconfigurable computing. Reprogrammable logic would offer the benefit of on-orbit design changes....
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creator | Sturesson, F. Mattsson, S. Carmichael, C. Harboe-Sorensen, R. |
description | This work presents the results from heavy ion tests of Xilinx Virtex FPGA XQVR300 manufactured by Xilinx in a 0.25/spl mu/m technology. Virtex XQVR300 is an SRAM-based FPGA, which allows for real-time reconfigurable computing. Reprogrammable logic would offer the benefit of on-orbit design changes. Earlier SEU testing on this type of device has reported high sensitivity to heavy ions. Mitigation techniques of single event upsets in Virtex devices as triple module redundancy (TMR) and configuration readback (bitstream repair) have been developed by Xilinx and are tested in this work. |
doi_str_mv | 10.1109/RADECS.2001.1159294 |
format | conference_proceeding |
fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_1159294</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1159294</ieee_id><sourcerecordid>1159294</sourcerecordid><originalsourceid>FETCH-LOGICAL-i105t-8c5d53bf48a7d9c1bf52334273cfa45106c8e4a33235597bacf38ca5b3146ef73</originalsourceid><addsrcrecordid>eNotj9FKwzAYhQMiKLNPsJu8QGeSP2mSy1K7VRgoznk70jSxEWslDeJ8eju2wwcHvosDB6ElJStKib5_KR_qardihNBZCM00v0KZlorMgAQKxQ3KpumDzOGCc1XcoqZx5ueIw_iFbW-iscnF8GfSSYwe7-o9HkIK72czuNSP3YT9GHHqHX4LMblfvH7elHfo2pvPyWWXXqD9un6tmnz7tHmsym0eKBEpV1Z0AlrPlZGdtrT1ggFwJsF6wwUlhVWOGwAGQmjZGutBWSNaoLxwXsICLc-7wTl3-I5hMPF4uPyFf2ZVSwE</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Heavy ion characterization of SEU mitigation methods for the Virtex FPGA</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Sturesson, F. ; Mattsson, S. ; Carmichael, C. ; Harboe-Sorensen, R.</creator><creatorcontrib>Sturesson, F. ; Mattsson, S. ; Carmichael, C. ; Harboe-Sorensen, R.</creatorcontrib><description>This work presents the results from heavy ion tests of Xilinx Virtex FPGA XQVR300 manufactured by Xilinx in a 0.25/spl mu/m technology. Virtex XQVR300 is an SRAM-based FPGA, which allows for real-time reconfigurable computing. Reprogrammable logic would offer the benefit of on-orbit design changes. Earlier SEU testing on this type of device has reported high sensitivity to heavy ions. Mitigation techniques of single event upsets in Virtex devices as triple module redundancy (TMR) and configuration readback (bitstream repair) have been developed by Xilinx and are tested in this work.</description><identifier>ISBN: 9780780373136</identifier><identifier>ISBN: 0780373138</identifier><identifier>DOI: 10.1109/RADECS.2001.1159294</identifier><language>eng</language><publisher>IEEE</publisher><subject>Circuit testing ; Field programmable gate arrays ; Filters ; Flip-flops ; Logic devices ; Plastics ; Redundancy ; Registers ; Single event upset ; Space technology</subject><ispartof>RADECS 2001. 2001 6th European Conference on Radiation and Its Effects on Components and Systems (Cat. No.01TH8605), 2001, p.285-291</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1159294$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,4050,4051,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1159294$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Sturesson, F.</creatorcontrib><creatorcontrib>Mattsson, S.</creatorcontrib><creatorcontrib>Carmichael, C.</creatorcontrib><creatorcontrib>Harboe-Sorensen, R.</creatorcontrib><title>Heavy ion characterization of SEU mitigation methods for the Virtex FPGA</title><title>RADECS 2001. 2001 6th European Conference on Radiation and Its Effects on Components and Systems (Cat. No.01TH8605)</title><addtitle>RADECS</addtitle><description>This work presents the results from heavy ion tests of Xilinx Virtex FPGA XQVR300 manufactured by Xilinx in a 0.25/spl mu/m technology. Virtex XQVR300 is an SRAM-based FPGA, which allows for real-time reconfigurable computing. Reprogrammable logic would offer the benefit of on-orbit design changes. Earlier SEU testing on this type of device has reported high sensitivity to heavy ions. Mitigation techniques of single event upsets in Virtex devices as triple module redundancy (TMR) and configuration readback (bitstream repair) have been developed by Xilinx and are tested in this work.</description><subject>Circuit testing</subject><subject>Field programmable gate arrays</subject><subject>Filters</subject><subject>Flip-flops</subject><subject>Logic devices</subject><subject>Plastics</subject><subject>Redundancy</subject><subject>Registers</subject><subject>Single event upset</subject><subject>Space technology</subject><isbn>9780780373136</isbn><isbn>0780373138</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2001</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotj9FKwzAYhQMiKLNPsJu8QGeSP2mSy1K7VRgoznk70jSxEWslDeJ8eju2wwcHvosDB6ElJStKib5_KR_qardihNBZCM00v0KZlorMgAQKxQ3KpumDzOGCc1XcoqZx5ueIw_iFbW-iscnF8GfSSYwe7-o9HkIK72czuNSP3YT9GHHqHX4LMblfvH7elHfo2pvPyWWXXqD9un6tmnz7tHmsym0eKBEpV1Z0AlrPlZGdtrT1ggFwJsF6wwUlhVWOGwAGQmjZGutBWSNaoLxwXsICLc-7wTl3-I5hMPF4uPyFf2ZVSwE</recordid><startdate>2001</startdate><enddate>2001</enddate><creator>Sturesson, F.</creator><creator>Mattsson, S.</creator><creator>Carmichael, C.</creator><creator>Harboe-Sorensen, R.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2001</creationdate><title>Heavy ion characterization of SEU mitigation methods for the Virtex FPGA</title><author>Sturesson, F. ; Mattsson, S. ; Carmichael, C. ; Harboe-Sorensen, R.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i105t-8c5d53bf48a7d9c1bf52334273cfa45106c8e4a33235597bacf38ca5b3146ef73</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2001</creationdate><topic>Circuit testing</topic><topic>Field programmable gate arrays</topic><topic>Filters</topic><topic>Flip-flops</topic><topic>Logic devices</topic><topic>Plastics</topic><topic>Redundancy</topic><topic>Registers</topic><topic>Single event upset</topic><topic>Space technology</topic><toplevel>online_resources</toplevel><creatorcontrib>Sturesson, F.</creatorcontrib><creatorcontrib>Mattsson, S.</creatorcontrib><creatorcontrib>Carmichael, C.</creatorcontrib><creatorcontrib>Harboe-Sorensen, R.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEL</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Sturesson, F.</au><au>Mattsson, S.</au><au>Carmichael, C.</au><au>Harboe-Sorensen, R.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Heavy ion characterization of SEU mitigation methods for the Virtex FPGA</atitle><btitle>RADECS 2001. 2001 6th European Conference on Radiation and Its Effects on Components and Systems (Cat. No.01TH8605)</btitle><stitle>RADECS</stitle><date>2001</date><risdate>2001</risdate><spage>285</spage><epage>291</epage><pages>285-291</pages><isbn>9780780373136</isbn><isbn>0780373138</isbn><abstract>This work presents the results from heavy ion tests of Xilinx Virtex FPGA XQVR300 manufactured by Xilinx in a 0.25/spl mu/m technology. Virtex XQVR300 is an SRAM-based FPGA, which allows for real-time reconfigurable computing. Reprogrammable logic would offer the benefit of on-orbit design changes. Earlier SEU testing on this type of device has reported high sensitivity to heavy ions. Mitigation techniques of single event upsets in Virtex devices as triple module redundancy (TMR) and configuration readback (bitstream repair) have been developed by Xilinx and are tested in this work.</abstract><pub>IEEE</pub><doi>10.1109/RADECS.2001.1159294</doi><tpages>7</tpages></addata></record> |
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subjects | Circuit testing Field programmable gate arrays Filters Flip-flops Logic devices Plastics Redundancy Registers Single event upset Space technology |
title | Heavy ion characterization of SEU mitigation methods for the Virtex FPGA |
url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-27T07%3A01%3A58IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Heavy%20ion%20characterization%20of%20SEU%20mitigation%20methods%20for%20the%20Virtex%20FPGA&rft.btitle=RADECS%202001.%202001%206th%20European%20Conference%20on%20Radiation%20and%20Its%20Effects%20on%20Components%20and%20Systems%20(Cat.%20No.01TH8605)&rft.au=Sturesson,%20F.&rft.date=2001&rft.spage=285&rft.epage=291&rft.pages=285-291&rft.isbn=9780780373136&rft.isbn_list=0780373138&rft_id=info:doi/10.1109/RADECS.2001.1159294&rft_dat=%3Cieee_6IE%3E1159294%3C/ieee_6IE%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i105t-8c5d53bf48a7d9c1bf52334273cfa45106c8e4a33235597bacf38ca5b3146ef73%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=1159294&rfr_iscdi=true |