True influence of wafer-backside copper contamination during the back-end process on device characteristics

The influence of backside Cu contamination during the back-end process on the electrical characteristics of MOSFETs was revealed. The influence is well explained in terms of Cu diffusion behavior at 400/spl deg/C, which strongly depends on SiO/sub 2/ thickness at front and back sides of wafers. Cu a...

Full description

Saved in:
Bibliographic Details
Main Authors: Hozawa, K., Miyazaki, H., Yugami, J.
Format: Conference Proceeding
Language:English
Subjects:
Annealing
Applied sciences
Copper
Dielectric breakdown
Electric variables
Electronics
Exact sciences and technology
MOS capacitors
MOSFETs
Optical films
Pollution measurement
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Surface contamination
Transistors
Wiring
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:The influence of backside Cu contamination during the back-end process on the electrical characteristics of MOSFETs was revealed. The influence is well explained in terms of Cu diffusion behavior at 400/spl deg/C, which strongly depends on SiO/sub 2/ thickness at front and back sides of wafers. Cu atoms brought into the Si wafer can not diffuse into the thick front-side SiO/sub 2/ film, but Cu atoms exist inside Si near the SiO/sub 2//Si interface after annealing. Accordingly, backside Cu contamination during the back-end process does not affect Time Zero Dielectric Breakdown (TZDB), Dit, or Vfb, but it decreases Time Dependent Dielectric Breakdown (TDDB) lifetime and drastically enhances short-channel effect due to impurity compensation.
DOI:10.1109/IEDM.2002.1175943