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True influence of wafer-backside copper contamination during the back-end process on device characteristics

The influence of backside Cu contamination during the back-end process on the electrical characteristics of MOSFETs was revealed. The influence is well explained in terms of Cu diffusion behavior at 400/spl deg/C, which strongly depends on SiO/sub 2/ thickness at front and back sides of wafers. Cu a...

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Main Authors: Hozawa, K., Miyazaki, H., Yugami, J.
Format: Conference Proceeding
Language:English
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Miyazaki, H.
Yugami, J.
description The influence of backside Cu contamination during the back-end process on the electrical characteristics of MOSFETs was revealed. The influence is well explained in terms of Cu diffusion behavior at 400/spl deg/C, which strongly depends on SiO/sub 2/ thickness at front and back sides of wafers. Cu atoms brought into the Si wafer can not diffuse into the thick front-side SiO/sub 2/ film, but Cu atoms exist inside Si near the SiO/sub 2//Si interface after annealing. Accordingly, backside Cu contamination during the back-end process does not affect Time Zero Dielectric Breakdown (TZDB), Dit, or Vfb, but it decreases Time Dependent Dielectric Breakdown (TDDB) lifetime and drastically enhances short-channel effect due to impurity compensation.
doi_str_mv 10.1109/IEDM.2002.1175943
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fullrecord <record><control><sourceid>pascalfrancis_6IE</sourceid><recordid>TN_cdi_ieee_primary_1175943</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1175943</ieee_id><sourcerecordid>15786007</sourcerecordid><originalsourceid>FETCH-LOGICAL-i201t-82e903808543d85d781b3380ee7c8124ee540c7170ae385df70e7e55c2f11c963</originalsourceid><addsrcrecordid>eNpFkEFLAzEQhQMiKLU_QLzk4nHrJNk02aPUqoWKl3ou6ezExrbZJdkq_nsjFRwGHo_v8Q6PsWsBEyGguVvMH14mEkAWa3RTqzM2boyF8srUUyku2DjnDyinCm30Jdut0pF4iH5_pIjEO8-_nKdUbRzucmiJY9f3lIrEwR1CdEPoIm-PKcR3PmyJ_wYrii3vU4eUM__F9BlKGW5dcjhQCnkImK_YuXf7TOM_HbG3x_lq9lwtX58Ws_tlFSSIobKSGlAWrK5Va3VrrNio4okMWiFrIl0DGmHAkSrcGyBDWqP0QmAzVSN2e-rtXUa398lFDHndp3Bw6XsttLFTAFNyN6dcIKJ_fJpO_QAvRGSP</addsrcrecordid><sourcetype>Index Database</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>True influence of wafer-backside copper contamination during the back-end process on device characteristics</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Hozawa, K. ; Miyazaki, H. ; Yugami, J.</creator><creatorcontrib>Hozawa, K. ; Miyazaki, H. ; Yugami, J.</creatorcontrib><description>The influence of backside Cu contamination during the back-end process on the electrical characteristics of MOSFETs was revealed. The influence is well explained in terms of Cu diffusion behavior at 400/spl deg/C, which strongly depends on SiO/sub 2/ thickness at front and back sides of wafers. Cu atoms brought into the Si wafer can not diffuse into the thick front-side SiO/sub 2/ film, but Cu atoms exist inside Si near the SiO/sub 2//Si interface after annealing. Accordingly, backside Cu contamination during the back-end process does not affect Time Zero Dielectric Breakdown (TZDB), Dit, or Vfb, but it decreases Time Dependent Dielectric Breakdown (TDDB) lifetime and drastically enhances short-channel effect due to impurity compensation.</description><identifier>ISBN: 9780780374621</identifier><identifier>ISBN: 0780374622</identifier><identifier>DOI: 10.1109/IEDM.2002.1175943</identifier><language>eng</language><publisher>Piscataway NJ: IEEE</publisher><subject>Annealing ; Applied sciences ; Copper ; Dielectric breakdown ; Electric variables ; Electronics ; Exact sciences and technology ; MOS capacitors ; MOSFETs ; Optical films ; Pollution measurement ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Surface contamination ; Transistors ; Wiring</subject><ispartof>Digest. International Electron Devices Meeting, 2002, p.737-740</ispartof><rights>2004 INIST-CNRS</rights><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1175943$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2051,4035,4036,27904,54898</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1175943$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&amp;idt=15786007$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Hozawa, K.</creatorcontrib><creatorcontrib>Miyazaki, H.</creatorcontrib><creatorcontrib>Yugami, J.</creatorcontrib><title>True influence of wafer-backside copper contamination during the back-end process on device characteristics</title><title>Digest. International Electron Devices Meeting</title><addtitle>IEDM</addtitle><description>The influence of backside Cu contamination during the back-end process on the electrical characteristics of MOSFETs was revealed. The influence is well explained in terms of Cu diffusion behavior at 400/spl deg/C, which strongly depends on SiO/sub 2/ thickness at front and back sides of wafers. Cu atoms brought into the Si wafer can not diffuse into the thick front-side SiO/sub 2/ film, but Cu atoms exist inside Si near the SiO/sub 2//Si interface after annealing. Accordingly, backside Cu contamination during the back-end process does not affect Time Zero Dielectric Breakdown (TZDB), Dit, or Vfb, but it decreases Time Dependent Dielectric Breakdown (TDDB) lifetime and drastically enhances short-channel effect due to impurity compensation.</description><subject>Annealing</subject><subject>Applied sciences</subject><subject>Copper</subject><subject>Dielectric breakdown</subject><subject>Electric variables</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>MOS capacitors</subject><subject>MOSFETs</subject><subject>Optical films</subject><subject>Pollution measurement</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Surface contamination</subject><subject>Transistors</subject><subject>Wiring</subject><isbn>9780780374621</isbn><isbn>0780374622</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2002</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNpFkEFLAzEQhQMiKLU_QLzk4nHrJNk02aPUqoWKl3ou6ezExrbZJdkq_nsjFRwGHo_v8Q6PsWsBEyGguVvMH14mEkAWa3RTqzM2boyF8srUUyku2DjnDyinCm30Jdut0pF4iH5_pIjEO8-_nKdUbRzucmiJY9f3lIrEwR1CdEPoIm-PKcR3PmyJ_wYrii3vU4eUM__F9BlKGW5dcjhQCnkImK_YuXf7TOM_HbG3x_lq9lwtX58Ws_tlFSSIobKSGlAWrK5Va3VrrNio4okMWiFrIl0DGmHAkSrcGyBDWqP0QmAzVSN2e-rtXUa398lFDHndp3Bw6XsttLFTAFNyN6dcIKJ_fJpO_QAvRGSP</recordid><startdate>2002</startdate><enddate>2002</enddate><creator>Hozawa, K.</creator><creator>Miyazaki, H.</creator><creator>Yugami, J.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope><scope>IQODW</scope></search><sort><creationdate>2002</creationdate><title>True influence of wafer-backside copper contamination during the back-end process on device characteristics</title><author>Hozawa, K. ; Miyazaki, H. ; Yugami, J.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i201t-82e903808543d85d781b3380ee7c8124ee540c7170ae385df70e7e55c2f11c963</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2002</creationdate><topic>Annealing</topic><topic>Applied sciences</topic><topic>Copper</topic><topic>Dielectric breakdown</topic><topic>Electric variables</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>MOS capacitors</topic><topic>MOSFETs</topic><topic>Optical films</topic><topic>Pollution measurement</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Surface contamination</topic><topic>Transistors</topic><topic>Wiring</topic><toplevel>online_resources</toplevel><creatorcontrib>Hozawa, K.</creatorcontrib><creatorcontrib>Miyazaki, H.</creatorcontrib><creatorcontrib>Yugami, J.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection><collection>Pascal-Francis</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Hozawa, K.</au><au>Miyazaki, H.</au><au>Yugami, J.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>True influence of wafer-backside copper contamination during the back-end process on device characteristics</atitle><btitle>Digest. International Electron Devices Meeting</btitle><stitle>IEDM</stitle><date>2002</date><risdate>2002</risdate><spage>737</spage><epage>740</epage><pages>737-740</pages><isbn>9780780374621</isbn><isbn>0780374622</isbn><abstract>The influence of backside Cu contamination during the back-end process on the electrical characteristics of MOSFETs was revealed. The influence is well explained in terms of Cu diffusion behavior at 400/spl deg/C, which strongly depends on SiO/sub 2/ thickness at front and back sides of wafers. Cu atoms brought into the Si wafer can not diffuse into the thick front-side SiO/sub 2/ film, but Cu atoms exist inside Si near the SiO/sub 2//Si interface after annealing. Accordingly, backside Cu contamination during the back-end process does not affect Time Zero Dielectric Breakdown (TZDB), Dit, or Vfb, but it decreases Time Dependent Dielectric Breakdown (TDDB) lifetime and drastically enhances short-channel effect due to impurity compensation.</abstract><cop>Piscataway NJ</cop><pub>IEEE</pub><doi>10.1109/IEDM.2002.1175943</doi><tpages>4</tpages></addata></record>
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ispartof Digest. International Electron Devices Meeting, 2002, p.737-740
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Annealing
Applied sciences
Copper
Dielectric breakdown
Electric variables
Electronics
Exact sciences and technology
MOS capacitors
MOSFETs
Optical films
Pollution measurement
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Surface contamination
Transistors
Wiring
title True influence of wafer-backside copper contamination during the back-end process on device characteristics
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-25T18%3A31%3A13IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-pascalfrancis_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=True%20influence%20of%20wafer-backside%20copper%20contamination%20during%20the%20back-end%20process%20on%20device%20characteristics&rft.btitle=Digest.%20International%20Electron%20Devices%20Meeting&rft.au=Hozawa,%20K.&rft.date=2002&rft.spage=737&rft.epage=740&rft.pages=737-740&rft.isbn=9780780374621&rft.isbn_list=0780374622&rft_id=info:doi/10.1109/IEDM.2002.1175943&rft_dat=%3Cpascalfrancis_6IE%3E15786007%3C/pascalfrancis_6IE%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i201t-82e903808543d85d781b3380ee7c8124ee540c7170ae385df70e7e55c2f11c963%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=1175943&rfr_iscdi=true