Interconnect-aware design methodology for analog and mixed signal design in silicon based technologies using high bandwidth on-chip transmission lines

This paper discusses a new interconnect-aware AMS design methodology which leads to better designs, and is in many ways superior to the RLC post-layout extraction approach. This methodology uses high bandwidth on-chip transmission lines (T-lines) for critical interconnect. The T-lines have been desi...

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Bibliographic Details
Main Authors: Goren, D., Zelikson, M., Gordin, R.
Format: Conference Proceeding
Language:English
Subjects:
Bandwidth
CMOS technology
Design methodology
Germanium silicon alloys
Measurement standards
Research and development
Semiconductor device modeling
Signal design
Silicon germanium
Transmission lines
Online Access:Request full text
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Summary:This paper discusses a new interconnect-aware AMS design methodology which leads to better designs, and is in many ways superior to the RLC post-layout extraction approach. This methodology uses high bandwidth on-chip transmission lines (T-lines) for critical interconnect. The T-lines have been designed for multi-layered metallization stack high speed silicon based technologies, such as the silicon germanium (SiGe) technology, as well as for high speed CMOS technologies.
DOI:10.1109/EEEI.2002.1178333