Loading…

METRIC: tracking down inefficiencies in the memory hierarchy via binary rewriting

We present METRIC, an environment for determining memory inefficiencies by examining data traces. METRIC is designed to alter the performance behavior of applications that are mostly constrained by their latency to resolve memory references. We make four primary contributions. First, we present meth...

Full description

Saved in:
Bibliographic Details
Main Authors: Marathe, J., Mueller, F., Mohan, T., de Supinski, B.R., McKee, S.A., Yoo, A.
Format: Conference Proceeding
Language:English
Subjects:
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
cited_by
cites
container_end_page 300
container_issue
container_start_page 289
container_title
container_volume
creator Marathe, J.
Mueller, F.
Mohan, T.
de Supinski, B.R.
McKee, S.A.
Yoo, A.
description We present METRIC, an environment for determining memory inefficiencies by examining data traces. METRIC is designed to alter the performance behavior of applications that are mostly constrained by their latency to resolve memory references. We make four primary contributions. First, we present methods to extract partial data traces from running applications by observing their memory behavior via dynamic binary rewriting. Second, we present a methodology to represent partial data traces in constant space for regular references through a novel technique for online compression of reference streams. Third, we employ offline cache simulation to derive indications about memory performance bottlenecks from partial data traces. By exploiting summarized memory metrics, by-reference metrics as well as cache evictor information, we can pin-point the sources of performance problems. Fourth, we demonstrate the ability to derive opportunities for optimizations and assess their benefits in several experiments resulting in up to 40% lower miss ratios.
doi_str_mv 10.1109/CGO.2003.1191553
format conference_proceeding
fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_1191553</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1191553</ieee_id><sourcerecordid>1191553</sourcerecordid><originalsourceid>FETCH-LOGICAL-i173t-189a845a755c327c2de36bee353052e0a148f3813d0f05655dc74b0fcd7319c73</originalsourceid><addsrcrecordid>eNotT1FLwzAYDIigzL4PfMkf6Ez65Wsa36TMOZgMZXseafrFRm0naXHs3xtwB8dx93DcMTaXYiGlMA_1arsohIDkjESEK5YZXQldGkwB4A3LxvFTJChUWKhb9va63L2v60c-Reu-wvDB2-Np4GEg74MLNCSOyfKpI95Tf4xn3gWKNrruzH-D5U0YbAojnWKYUsEdu_b2e6TsojO2f17u6pd8s12t66dNHqSGKZeVsZVCqxEdFNoVLUHZEAGCwIKElaryUElohRdYIrZOq0Z412qQxmmYsfv_3kBEh58Y-jTjcDkOf5psTWI</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>METRIC: tracking down inefficiencies in the memory hierarchy via binary rewriting</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Marathe, J. ; Mueller, F. ; Mohan, T. ; de Supinski, B.R. ; McKee, S.A. ; Yoo, A.</creator><creatorcontrib>Marathe, J. ; Mueller, F. ; Mohan, T. ; de Supinski, B.R. ; McKee, S.A. ; Yoo, A.</creatorcontrib><description>We present METRIC, an environment for determining memory inefficiencies by examining data traces. METRIC is designed to alter the performance behavior of applications that are mostly constrained by their latency to resolve memory references. We make four primary contributions. First, we present methods to extract partial data traces from running applications by observing their memory behavior via dynamic binary rewriting. Second, we present a methodology to represent partial data traces in constant space for regular references through a novel technique for online compression of reference streams. Third, we employ offline cache simulation to derive indications about memory performance bottlenecks from partial data traces. By exploiting summarized memory metrics, by-reference metrics as well as cache evictor information, we can pin-point the sources of performance problems. Fourth, we demonstrate the ability to derive opportunities for optimizations and assess their benefits in several experiments resulting in up to 40% lower miss ratios.</description><identifier>ISBN: 9780769519135</identifier><identifier>ISBN: 076951913X</identifier><identifier>DOI: 10.1109/CGO.2003.1191553</identifier><language>eng</language><publisher>IEEE</publisher><subject>Computational modeling ; Computer architecture ; Contracts ; Delay ; Instruments ; Laboratories ; Large-scale systems ; Libraries ; Manipulator dynamics ; Subcontracting</subject><ispartof>International Symposium on Code Generation and Optimization, 2003. CGO 2003, 2003, p.289-300</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1191553$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,4050,4051,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1191553$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Marathe, J.</creatorcontrib><creatorcontrib>Mueller, F.</creatorcontrib><creatorcontrib>Mohan, T.</creatorcontrib><creatorcontrib>de Supinski, B.R.</creatorcontrib><creatorcontrib>McKee, S.A.</creatorcontrib><creatorcontrib>Yoo, A.</creatorcontrib><title>METRIC: tracking down inefficiencies in the memory hierarchy via binary rewriting</title><title>International Symposium on Code Generation and Optimization, 2003. CGO 2003</title><addtitle>CGO</addtitle><description>We present METRIC, an environment for determining memory inefficiencies by examining data traces. METRIC is designed to alter the performance behavior of applications that are mostly constrained by their latency to resolve memory references. We make four primary contributions. First, we present methods to extract partial data traces from running applications by observing their memory behavior via dynamic binary rewriting. Second, we present a methodology to represent partial data traces in constant space for regular references through a novel technique for online compression of reference streams. Third, we employ offline cache simulation to derive indications about memory performance bottlenecks from partial data traces. By exploiting summarized memory metrics, by-reference metrics as well as cache evictor information, we can pin-point the sources of performance problems. Fourth, we demonstrate the ability to derive opportunities for optimizations and assess their benefits in several experiments resulting in up to 40% lower miss ratios.</description><subject>Computational modeling</subject><subject>Computer architecture</subject><subject>Contracts</subject><subject>Delay</subject><subject>Instruments</subject><subject>Laboratories</subject><subject>Large-scale systems</subject><subject>Libraries</subject><subject>Manipulator dynamics</subject><subject>Subcontracting</subject><isbn>9780769519135</isbn><isbn>076951913X</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2003</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotT1FLwzAYDIigzL4PfMkf6Ez65Wsa36TMOZgMZXseafrFRm0naXHs3xtwB8dx93DcMTaXYiGlMA_1arsohIDkjESEK5YZXQldGkwB4A3LxvFTJChUWKhb9va63L2v60c-Reu-wvDB2-Np4GEg74MLNCSOyfKpI95Tf4xn3gWKNrruzH-D5U0YbAojnWKYUsEdu_b2e6TsojO2f17u6pd8s12t66dNHqSGKZeVsZVCqxEdFNoVLUHZEAGCwIKElaryUElohRdYIrZOq0Z412qQxmmYsfv_3kBEh58Y-jTjcDkOf5psTWI</recordid><startdate>2003</startdate><enddate>2003</enddate><creator>Marathe, J.</creator><creator>Mueller, F.</creator><creator>Mohan, T.</creator><creator>de Supinski, B.R.</creator><creator>McKee, S.A.</creator><creator>Yoo, A.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2003</creationdate><title>METRIC: tracking down inefficiencies in the memory hierarchy via binary rewriting</title><author>Marathe, J. ; Mueller, F. ; Mohan, T. ; de Supinski, B.R. ; McKee, S.A. ; Yoo, A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i173t-189a845a755c327c2de36bee353052e0a148f3813d0f05655dc74b0fcd7319c73</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2003</creationdate><topic>Computational modeling</topic><topic>Computer architecture</topic><topic>Contracts</topic><topic>Delay</topic><topic>Instruments</topic><topic>Laboratories</topic><topic>Large-scale systems</topic><topic>Libraries</topic><topic>Manipulator dynamics</topic><topic>Subcontracting</topic><toplevel>online_resources</toplevel><creatorcontrib>Marathe, J.</creatorcontrib><creatorcontrib>Mueller, F.</creatorcontrib><creatorcontrib>Mohan, T.</creatorcontrib><creatorcontrib>de Supinski, B.R.</creatorcontrib><creatorcontrib>McKee, S.A.</creatorcontrib><creatorcontrib>Yoo, A.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Marathe, J.</au><au>Mueller, F.</au><au>Mohan, T.</au><au>de Supinski, B.R.</au><au>McKee, S.A.</au><au>Yoo, A.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>METRIC: tracking down inefficiencies in the memory hierarchy via binary rewriting</atitle><btitle>International Symposium on Code Generation and Optimization, 2003. CGO 2003</btitle><stitle>CGO</stitle><date>2003</date><risdate>2003</risdate><spage>289</spage><epage>300</epage><pages>289-300</pages><isbn>9780769519135</isbn><isbn>076951913X</isbn><abstract>We present METRIC, an environment for determining memory inefficiencies by examining data traces. METRIC is designed to alter the performance behavior of applications that are mostly constrained by their latency to resolve memory references. We make four primary contributions. First, we present methods to extract partial data traces from running applications by observing their memory behavior via dynamic binary rewriting. Second, we present a methodology to represent partial data traces in constant space for regular references through a novel technique for online compression of reference streams. Third, we employ offline cache simulation to derive indications about memory performance bottlenecks from partial data traces. By exploiting summarized memory metrics, by-reference metrics as well as cache evictor information, we can pin-point the sources of performance problems. Fourth, we demonstrate the ability to derive opportunities for optimizations and assess their benefits in several experiments resulting in up to 40% lower miss ratios.</abstract><pub>IEEE</pub><doi>10.1109/CGO.2003.1191553</doi><tpages>12</tpages></addata></record>
fulltext fulltext_linktorsrc
identifier ISBN: 9780769519135
ispartof International Symposium on Code Generation and Optimization, 2003. CGO 2003, 2003, p.289-300
issn
language eng
recordid cdi_ieee_primary_1191553
source IEEE Electronic Library (IEL) Conference Proceedings
subjects Computational modeling
Computer architecture
Contracts
Delay
Instruments
Laboratories
Large-scale systems
Libraries
Manipulator dynamics
Subcontracting
title METRIC: tracking down inefficiencies in the memory hierarchy via binary rewriting
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-08T01%3A07%3A25IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=METRIC:%20tracking%20down%20inefficiencies%20in%20the%20memory%20hierarchy%20via%20binary%20rewriting&rft.btitle=International%20Symposium%20on%20Code%20Generation%20and%20Optimization,%202003.%20CGO%202003&rft.au=Marathe,%20J.&rft.date=2003&rft.spage=289&rft.epage=300&rft.pages=289-300&rft.isbn=9780769519135&rft.isbn_list=076951913X&rft_id=info:doi/10.1109/CGO.2003.1191553&rft_dat=%3Cieee_6IE%3E1191553%3C/ieee_6IE%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i173t-189a845a755c327c2de36bee353052e0a148f3813d0f05655dc74b0fcd7319c73%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=1191553&rfr_iscdi=true