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An architecture for multiresolution, focal, image analysis
A segmented pipeline architecture for multiresolution, focal, array processing is presented. A buffer is introduced at each point in a pipeline computation at which changes in sample density or analysis area may take place. These buffers divide the pipeline into segments, each with constant data loa...
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container_end_page | 311 vol.2 |
container_issue | |
container_start_page | 305 |
container_title | |
container_volume | ii |
creator | Burt, P.J. van der Wal, G. |
description | A segmented pipeline architecture for multiresolution, focal, array processing is presented. A buffer is introduced at each point in a pipeline computation at which changes in sample density or analysis area may take place. These buffers divide the pipeline into segments, each with constant data load. When active, a segment runs at its full design rate. Efficiency is maintained by switching processing elements between segments as image data flows through the system. The segmented pipeline architecture is illustrated with an application to image motion analysis.< > |
doi_str_mv | 10.1109/ICPR.1990.119374 |
format | conference_proceeding |
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A buffer is introduced at each point in a pipeline computation at which changes in sample density or analysis area may take place. These buffers divide the pipeline into segments, each with constant data load. When active, a segment runs at its full design rate. Efficiency is maintained by switching processing elements between segments as image data flows through the system. The segmented pipeline architecture is illustrated with an application to image motion analysis.< ></description><identifier>ISBN: 0818620625</identifier><identifier>ISBN: 9780818620621</identifier><identifier>DOI: 10.1109/ICPR.1990.119374</identifier><language>eng</language><publisher>IEEE Comput. Soc. Press</publisher><subject>Algorithm design and analysis ; Buffer storage ; Computer architecture ; Image analysis ; Image motion analysis ; Image resolution ; Image segmentation ; Machine vision ; Pipeline processing ; Real time systems</subject><ispartof>[1990] Proceedings. 10th International Conference on Pattern Recognition, 1990, Vol.ii, p.305-311 vol.2</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/119374$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,4050,4051,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/119374$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Burt, P.J.</creatorcontrib><creatorcontrib>van der Wal, G.</creatorcontrib><title>An architecture for multiresolution, focal, image analysis</title><title>[1990] Proceedings. 10th International Conference on Pattern Recognition</title><addtitle>ICPR</addtitle><description>A segmented pipeline architecture for multiresolution, focal, array processing is presented. A buffer is introduced at each point in a pipeline computation at which changes in sample density or analysis area may take place. These buffers divide the pipeline into segments, each with constant data load. When active, a segment runs at its full design rate. Efficiency is maintained by switching processing elements between segments as image data flows through the system. The segmented pipeline architecture is illustrated with an application to image motion analysis.< ></description><subject>Algorithm design and analysis</subject><subject>Buffer storage</subject><subject>Computer architecture</subject><subject>Image analysis</subject><subject>Image motion analysis</subject><subject>Image resolution</subject><subject>Image segmentation</subject><subject>Machine vision</subject><subject>Pipeline processing</subject><subject>Real time systems</subject><isbn>0818620625</isbn><isbn>9780818620621</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1990</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNpjYJAwNNAzNDSw1Pd0DgjSM7S0BHEtjc1NmBm4DCwMLcyMDMyMTDkYeIuLswwMDIBKzSxMDTkZrBzzFBKLkjMyS1KTS0qLUhXS8osUcktzSjKLUovzc0pLMvPzdICCyYk5OgqZuYnpqQqJeYk5lcWZxTwMrGmJOcWpvFCam0HKzTXE2UM3MzU1Nb6gCKi6qDIe4gpjvJIAw5k2Ig</recordid><startdate>1990</startdate><enddate>1990</enddate><creator>Burt, P.J.</creator><creator>van der Wal, G.</creator><general>IEEE Comput. Soc. Press</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1990</creationdate><title>An architecture for multiresolution, focal, image analysis</title><author>Burt, P.J. ; van der Wal, G.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-ieee_primary_1193743</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1990</creationdate><topic>Algorithm design and analysis</topic><topic>Buffer storage</topic><topic>Computer architecture</topic><topic>Image analysis</topic><topic>Image motion analysis</topic><topic>Image resolution</topic><topic>Image segmentation</topic><topic>Machine vision</topic><topic>Pipeline processing</topic><topic>Real time systems</topic><toplevel>online_resources</toplevel><creatorcontrib>Burt, P.J.</creatorcontrib><creatorcontrib>van der Wal, G.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Xplore</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Burt, P.J.</au><au>van der Wal, G.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>An architecture for multiresolution, focal, image analysis</atitle><btitle>[1990] Proceedings. 10th International Conference on Pattern Recognition</btitle><stitle>ICPR</stitle><date>1990</date><risdate>1990</risdate><volume>ii</volume><spage>305</spage><epage>311 vol.2</epage><pages>305-311 vol.2</pages><isbn>0818620625</isbn><isbn>9780818620621</isbn><abstract>A segmented pipeline architecture for multiresolution, focal, array processing is presented. A buffer is introduced at each point in a pipeline computation at which changes in sample density or analysis area may take place. These buffers divide the pipeline into segments, each with constant data load. When active, a segment runs at its full design rate. Efficiency is maintained by switching processing elements between segments as image data flows through the system. The segmented pipeline architecture is illustrated with an application to image motion analysis.< ></abstract><pub>IEEE Comput. Soc. Press</pub><doi>10.1109/ICPR.1990.119374</doi></addata></record> |
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identifier | ISBN: 0818620625 |
ispartof | [1990] Proceedings. 10th International Conference on Pattern Recognition, 1990, Vol.ii, p.305-311 vol.2 |
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language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Algorithm design and analysis Buffer storage Computer architecture Image analysis Image motion analysis Image resolution Image segmentation Machine vision Pipeline processing Real time systems |
title | An architecture for multiresolution, focal, image analysis |
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