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Dependability analysis: a new application for run-time reconfiguration
The probability of faults, and especially transient faults, occurring in the field is increasing with the evolutions of the CMOS technologies. It becomes therefore crucial to predict the potential consequences of such faults on the applications. Fault injection techniques based on the high level des...
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creator | Leveugle, R. Antoni, L. Feher, B. |
description | The probability of faults, and especially transient faults, occurring in the field is increasing with the evolutions of the CMOS technologies. It becomes therefore crucial to predict the potential consequences of such faults on the applications. Fault injection techniques based on the high level descriptions of the circuits have been proposed for an early dependability analysis. In this paper, a new approach is proposed, based on emulation and run-time reconfiguration. Performance evaluations and practical experiments on a Virtex development board are reported. |
doi_str_mv | 10.1109/IPDPS.2003.1213319 |
format | conference_proceeding |
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It becomes therefore crucial to predict the potential consequences of such faults on the applications. Fault injection techniques based on the high level descriptions of the circuits have been proposed for an early dependability analysis. In this paper, a new approach is proposed, based on emulation and run-time reconfiguration. Performance evaluations and practical experiments on a Virtex development board are reported.</description><identifier>ISSN: 1530-2075</identifier><identifier>ISBN: 0769519261</identifier><identifier>ISBN: 9780769519265</identifier><identifier>DOI: 10.1109/IPDPS.2003.1213319</identifier><language>eng</language><publisher>IEEE</publisher><subject>Circuit faults ; Circuit simulation ; CMOS technology ; Emulation ; Field programmable gate arrays ; Hardware ; Information analysis ; Prototypes ; Runtime ; Space technology</subject><ispartof>Proceedings International Parallel and Distributed Processing Symposium, 2003, p.7 pp.</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1213319$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,4050,4051,27925,54555,54920,54932</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1213319$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Leveugle, R.</creatorcontrib><creatorcontrib>Antoni, L.</creatorcontrib><creatorcontrib>Feher, B.</creatorcontrib><title>Dependability analysis: a new application for run-time reconfiguration</title><title>Proceedings International Parallel and Distributed Processing Symposium</title><addtitle>IPDPS</addtitle><description>The probability of faults, and especially transient faults, occurring in the field is increasing with the evolutions of the CMOS technologies. It becomes therefore crucial to predict the potential consequences of such faults on the applications. Fault injection techniques based on the high level descriptions of the circuits have been proposed for an early dependability analysis. In this paper, a new approach is proposed, based on emulation and run-time reconfiguration. Performance evaluations and practical experiments on a Virtex development board are reported.</description><subject>Circuit faults</subject><subject>Circuit simulation</subject><subject>CMOS technology</subject><subject>Emulation</subject><subject>Field programmable gate arrays</subject><subject>Hardware</subject><subject>Information analysis</subject><subject>Prototypes</subject><subject>Runtime</subject><subject>Space technology</subject><issn>1530-2075</issn><isbn>0769519261</isbn><isbn>9780769519265</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2003</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotj8tKAzEYhQMqWGtfQDd5gRnzJ5ObO2mtFgoW1HXJVSPTzJCZIn37Fu3ZnMUHh-8gdAekBiD6YbVZbN5rSgirgQJjoC_QDZFCc9BUwCWaAGekokTyazQbhh9ySsN505AJWi5CH7I3NrVpPGCTTXsY0vCIDc7hF5u-b5MzY-oyjl3BZZ-rMe0CLsF1OaavffmDt-gqmnYIs3NP0efy-WP-Wq3fXlbzp3X1DbQZKwkGTlrCca-kUywaENpF460iWnjlg-WKAZXE2ugVV1FbKaR1lEqgzLMpuv_fTSGEbV_SzpTD9nybHQF8G0xz</recordid><startdate>2003</startdate><enddate>2003</enddate><creator>Leveugle, R.</creator><creator>Antoni, L.</creator><creator>Feher, B.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2003</creationdate><title>Dependability analysis: a new application for run-time reconfiguration</title><author>Leveugle, R. ; Antoni, L. ; Feher, B.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-h124t-71a19516c5d87c83fa169cfadb8096d8deb5831270bbfd858f9b767bc227123d3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2003</creationdate><topic>Circuit faults</topic><topic>Circuit simulation</topic><topic>CMOS technology</topic><topic>Emulation</topic><topic>Field programmable gate arrays</topic><topic>Hardware</topic><topic>Information analysis</topic><topic>Prototypes</topic><topic>Runtime</topic><topic>Space technology</topic><toplevel>online_resources</toplevel><creatorcontrib>Leveugle, R.</creatorcontrib><creatorcontrib>Antoni, L.</creatorcontrib><creatorcontrib>Feher, B.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Leveugle, R.</au><au>Antoni, L.</au><au>Feher, B.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Dependability analysis: a new application for run-time reconfiguration</atitle><btitle>Proceedings International Parallel and Distributed Processing Symposium</btitle><stitle>IPDPS</stitle><date>2003</date><risdate>2003</risdate><spage>7 pp.</spage><pages>7 pp.-</pages><issn>1530-2075</issn><isbn>0769519261</isbn><isbn>9780769519265</isbn><abstract>The probability of faults, and especially transient faults, occurring in the field is increasing with the evolutions of the CMOS technologies. It becomes therefore crucial to predict the potential consequences of such faults on the applications. Fault injection techniques based on the high level descriptions of the circuits have been proposed for an early dependability analysis. In this paper, a new approach is proposed, based on emulation and run-time reconfiguration. Performance evaluations and practical experiments on a Virtex development board are reported.</abstract><pub>IEEE</pub><doi>10.1109/IPDPS.2003.1213319</doi></addata></record> |
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ispartof | Proceedings International Parallel and Distributed Processing Symposium, 2003, p.7 pp. |
issn | 1530-2075 |
language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Circuit faults Circuit simulation CMOS technology Emulation Field programmable gate arrays Hardware Information analysis Prototypes Runtime Space technology |
title | Dependability analysis: a new application for run-time reconfiguration |
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