Barrier-first integration for improved reliability in copper dual damascene interconnects

A new PVD barrier process is demonstrated that eliminates critical dimension (CD) loss and copper contamination of intra-layer dielectric (ILD) caused by conventional argon sputter precleans. In this process, a layer of Ta(N) is first deposited to protect the via sidewalls from contamination, then a...

Full description

Saved in:
Bibliographic Details
Main Authors: Alers, G.B., Rozbicki, R.T., Harm, G.J., Kailasam, S.K., Ray, G.W., Danek, M.
Format: Conference Proceeding
Language:English
Subjects:
Argon
Atherosclerosis
Contamination
Copper
Dielectric losses
Electromigration
Protection
Radio frequency
Sputter etching
Stress
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:A new PVD barrier process is demonstrated that eliminates critical dimension (CD) loss and copper contamination of intra-layer dielectric (ILD) caused by conventional argon sputter precleans. In this process, a layer of Ta(N) is first deposited to protect the via sidewalls from contamination, then an RF bias is applied to the wafer during subsequent barrier deposition such that there is a net etch (resputter) from the bottom of the vias. The resputter step allows effective removal of Cu oxide and etch-residues without contamination of the dielectric with resputtered copper, and without faceting of the ILD. This barrier-first scheme improves via resistance, ILD reliability, via stress migration and electromigration performance relative to a conventional argon sputter preclean.
DOI:10.1109/IITC.2003.1219702