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Hydrogenated amorphous silicon thin-film transistor arrays fabricated by digital lithography
A jet-printed digital-lithographic method, in place of conventional photolithography, was used to fabricate 64 × 64 pixel (300 μm pitch) matrix addressing thin-film transistor (TFT) arrays. The average hydrogenated amorphous silicon TFT device within an array had a threshold voltage of /spl sim/3.5...
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Published in: | IEEE electron device letters 2003-09, Vol.24 (9), p.577-579 |
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Main Authors: | , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | A jet-printed digital-lithographic method, in place of conventional photolithography, was used to fabricate 64 × 64 pixel (300 μm pitch) matrix addressing thin-film transistor (TFT) arrays. The average hydrogenated amorphous silicon TFT device within an array had a threshold voltage of /spl sim/3.5 V, carrier mobility of 0.7 cm 2 /V/spl middot/s, subthreshold slope of 0.76 V/decade, and an on/off ratio of 10/sup 8/. |
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ISSN: | 0741-3106 1558-0563 |
DOI: | 10.1109/LED.2003.815939 |