Test scheduling for embedded systems

The paper proposes two approaches to test scheduling. The first one utilizes the concept of TACG (Test Application Conflict Graph). For the testing process the resource utilization model is defined and used for the TACG construction. Different conflicts that must be taken into account during test sc...

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Bibliographic Details
Main Authors: Kotasek, Z., Mika, D., Strnadel, J.
Format: Conference Proceeding
Language:English
Subjects:
Built-in self-test
Circuit testing
Embedded system
Energy consumption
Information technology
Optimization methods
Paper technology
Processor scheduling
Resource management
System testing
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Summary:The paper proposes two approaches to test scheduling. The first one utilizes the concept of TACG (Test Application Conflict Graph). For the testing process the resource utilization model is defined and used for the TACG construction. Different conflicts that must be taken into account during test scheduling are presented. The paper offers a methodology that can be utilized during embedded test design process, the final goal of which is to reduce the overall test application time and power consumption during the test application. The second methodology is based on optimising the test schedule - the test application time, TAM width and power consumption are taken into account during the process. The goal of the methodology is a reasonable trade-off between these parameters.
DOI:10.1109/DSD.2003.1231985