A robust digital baseband predistorter constructed using memory polynomials

Power amplifiers (PAs) are inherently nonlinear devices and are used in virtually all communications systems. Digital baseband predistortion is a highly cost-effective way to linearize PAs, but most existing architectures assume that the PA has a memoryless nonlinearity. For wider bandwidth applicat...

Full description

Saved in:
Bibliographic Details
Published in:IEEE transactions on communications 2004-01, Vol.52 (1), p.159-165
Main Authors: Lei Ding, Zhou, G.T., Morgan, D.R., Zhengxiang Ma, Kenney, J.S., Jaehyeong Kim, Giardina, C.R.
Format: Article
Language:English
Subjects:
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:Power amplifiers (PAs) are inherently nonlinear devices and are used in virtually all communications systems. Digital baseband predistortion is a highly cost-effective way to linearize PAs, but most existing architectures assume that the PA has a memoryless nonlinearity. For wider bandwidth applications such as wideband code-division multiple access (WCDMA) or wideband orthogonal frequency-division multiplexing (W-OFDM), PA memory effects can no longer be ignored, and memoryless predistortion has limited effectiveness. In this paper, instead of focusing on a particular PA model and building a corresponding predistorter, we focus directly on the predistorter structure. In particular, we propose a memory polynomial model for the predistorter and implement it using an indirect learning architecture. Linearization performance is demonstrated on a three-carrier WCDMA signal.
ISSN:0090-6778
1558-0857
DOI:10.1109/TCOMM.2003.822188