A comparative analysis of parallel delta-sigma ADC architectures

Parallelism can be used to increase the conversion bandwidth of delta-sigma (/spl Delta//spl Sigma/) analog-to-digital converters (ADCs). Time-interleaved, parallel /spl Delta//spl Sigma/, and frequency-band-decomposition ADCs are three parallel architectures that are shown to be explained using the...

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Bibliographic Details
Published in:IEEE transactions on circuits and systems. 1, Fundamental theory and applications Fundamental theory and applications, 2004-03, Vol.51 (3), p.450-458
Main Authors: Eshraghi, A., Fiez, T.S.
Format: Article
Language:English
Subjects:
Analog-digital conversion
Architecture
Bandwidth
Channels
Circuits
Conversion
Costs
Design engineering
Digital filters
Digital modulation
Frequency
Frequency spectrum
Internet
Parallel architectures
Quantization
Randomization
Wireless communication
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Summary:Parallelism can be used to increase the conversion bandwidth of delta-sigma (/spl Delta//spl Sigma/) analog-to-digital converters (ADCs). Time-interleaved, parallel /spl Delta//spl Sigma/, and frequency-band-decomposition ADCs are three parallel architectures that are shown to be explained using the same underlying theory. This common structure is then used to explore the design tradeoffs among these architectures. It is shown that the frequency-band-decomposition ADC is insensitive to channel mismatches but it is the most complex to design. The Hadamard modulated parallel /spl Delta//spl Sigma/ ADC provides the best performance (without considering nonidealities) but requires large digital filters. Finally, a randomization technique is described that can be used with parallel /spl Delta//spl Sigma/ architectures to spread out the tonal energy due to channel mismatches over the frequency spectrum.
ISSN:1549-8328
1057-7122
1558-0806
DOI:10.1109/TCSI.2004.823663