Electromagnetic modelling of switching noise in on-chip power distribution networks

An investigation of the effect of substrate loss on simultaneous switching noise (SSN) in on-chip power distribution networks is presented. In order to characterize the multi-layered power buses accurately for on-chip switching noise simulation, modelling of Vdd/ground rails over finite-resistivity...

Full description

Saved in:
Bibliographic Details
Main Authors: Jifeng Mao, Woopoung Kim, Suna Choi, Swaminathan, M., Libous, J., O'connor, D.
Format: Conference Proceeding
Language:English
Subjects:
Circuit noise
Circuit simulation
Dielectric losses
Dielectric substrates
Electromagnetic interference
Electromagnetic modeling
Finite difference methods
Network-on-a-chip
Power systems
Rails
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:An investigation of the effect of substrate loss on simultaneous switching noise (SSN) in on-chip power distribution networks is presented. In order to characterize the multi-layered power buses accurately for on-chip switching noise simulation, modelling of Vdd/ground rails over finite-resistivity substrates should include dielectric loss. The complete circuit model of power rails are then represented using RLCG elements. The waveform and propagation pattern of the noise are captured using finite difference time domain (FDTD) technique. This paper shows the effect of silicon substrate with different resistivities on the propagation of on-chip switching noise.
DOI:10.1109/ICEMIC.2003.237781