Planar high performance ring generators

The paper presents enhanced architectures of pseudo-random test pattern generators and on-chip test data decompressors based on ring generators. The new structures are aimed at improving their layout and routing properties while at the same time reducing propagation delays introduced by associated p...

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Bibliographic Details
Main Authors: Mrugalski, G., Mukherjee, N., Rajski, J., Tyszer, J.
Format: Conference Proceeding
Language:English
Subjects:
Applied sciences
Automata
Circuit properties
Circuit testing
Circuits of signal characteristics conditioning (including delay circuits)
Design. Technologies. Operation analysis. Testing
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Exact sciences and technology
Flip-flops
Integrated circuits
Logic circuits
Phase shifters
Polynomials
Propagation delay
Ring generators
Routing
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Test pattern generators
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Description
Summary:The paper presents enhanced architectures of pseudo-random test pattern generators and on-chip test data decompressors based on ring generators. The new structures are aimed at improving their layout and routing properties while at the same time reducing propagation delays introduced by associated phase shifters.
ISSN:1093-0167
2375-1053
DOI:10.1109/VTEST.2004.1299243