S-band operation of SiC power MESFET with 20 W (4.4 W/mm) output power and 60% PAE

• Published in: IEEE transactions on electron devices 2004-06, Vol.51 (6), p.839-845
• Main Authors: Henry, H.G., Augustine, G., DeSalvo, G.C., Brooks, R.C., Barron, R.R., Oliver, J.D., Morse, A.W., Veasel, B.W., Esker, P.M., Clarke, R.C.
• Format: Article
• Language: English
• Subjects: Channels; Devices; Electric power generation; Gates; MESFETs; Noise levels; Power MESFETs; Silicon carbide; Silicon compounds; Surface chemistry
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2004.828279

Previous efforts have revealed instabilities in standard SiC MESFET device electrical characteristics, which have been attributed to charged surface states. This work describes the use of an undoped "spacer" layer on top of a SiC MESFET to form a "buried-channel" structure where the active current carrying channel is removed from the surface. By using this approach, the induced surface traps are physically removed from the channel region, such that the depletion depth caused by the unneutralized surface states cannot reach the conductive channel. This results in minimal RF dispersion ("gate lag") and, thus, improved RF performance. Furthermore, the buried-channel approach provides for a relatively broad and uniform transconductance (G/sub m/) with gate bias (V/sub gs/), resulting in higher efficiency MESFETs with improved linearity and lower signal distortion. SiC MESFETs having 4.8-mm gate periphery were fabricated using this buried-channel structure and were measured to have an output power of 21 W (P/sub out//spl sim/4.4 W/mm), 62% power added efficiency, and 10.6 dB power gain at 3 GHz under pulse operation. When operated at continuous wave, similar 4.8-mm gate periphery SiC MESFETs produced 9.2 W output power (P/sub out//spl sim/2 W/mm), 40% PAE, and /spl sim/7 dB associated gain at 3 GHz.