Time-precision flexible adder

A new conception of flexible calculation that allows us to adjust a sum depending on the available time computation is presented. More specifically, the objective is to obtain a calculation model that makes the processing time/precision more flexible. The addition method is based on carry-select sch...

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Bibliographic Details
Main Authors: Chamizo, J.M.G., Pascual, J.M., Mora, H.M.
Format: Conference Proceeding
Language:English
Subjects:
Adders
Algorithm design and analysis
Arithmetic
Computer architecture
Costs
Delay
Field programmable gate arrays
Government
Sensor systems
Table lookup
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Description
Summary:A new conception of flexible calculation that allows us to adjust a sum depending on the available time computation is presented. More specifically, the objective is to obtain a calculation model that makes the processing time/precision more flexible. The addition method is based on carry-select scheme adder and the proposed design uses precalculated data stored in look-up tables, which provide, above all, quality results and systematization in the implementation of low level primitives that set parameters for the processing time. We report an evaluation of the architecture in area, delay and computation error, as well as a suitable implementation in FPGA to validate the design.
DOI:10.1109/ICECS.2003.1301676