The recursive nanobox processor grid: a reliable system architecture for unreliable nanotechnology devices

Advanced molecular nanotechnology devices are expected to have exceedingly high transient fault rates and large numbers of inherent device defects compared to conventional CMOS devices. We introduce the recursive nanobox processor grid as an application specific, fault-tolerant, parallel computing s...

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Bibliographic Details
Main Authors: KleinOsowski, A.J., KleinOsowski, K., Rangarajan, V., Ranganath, P., Lilja, D.J.
Format: Conference Proceeding
Language:English
Subjects:
Applied sciences
Computer architecture
Computer science
control theory
systems
Computer systems and distributed systems. User interface
Error analysis
Error correction
Exact sciences and technology
Fabrication
Failure analysis
Fault tolerant systems
Nanoscale devices
Nanotechnology
Parallel processing
Semiconductor device modeling
Software
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Summary:Advanced molecular nanotechnology devices are expected to have exceedingly high transient fault rates and large numbers of inherent device defects compared to conventional CMOS devices. We introduce the recursive nanobox processor grid as an application specific, fault-tolerant, parallel computing system designed for fabrication with unreliable nanotechnology devices. In this initial study we construct VHDL models of the nanobox processor cell ALU and evaluate the effectiveness of our recursive fault masking approach in the presence of random transient errors. Our analysis shows that the ALU can calculate correctly 100 percent of the time with raw FIT (failures in time) rates as high as 10/sub 23/. We achieve this error correction with an area overhead on the order of 9x, which is quite reasonable given the high integration densities expected with nanodevices.
DOI:10.1109/DSN.2004.1311887