Applications of plan-view TEM analysis to IC debugging

In this report, applications of plan-view TEM analyses to IC debugging has been applied to some FA cases, where frequently used tools, such as SEM, FIB, AFM, etc., are not able to reveal the crystalline defects buried in the Si substrate. The novel examples include IC process induced oxidation stack...

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Bibliographic Details
Main Authors: Hsieh, Y.F., Chen, J.C., Lo, C.K., Wu, Y.R., Chiu, J.F.
Format: Conference Proceeding
Language:English
Subjects:
Application specific integrated circuits
Applied sciences
Crystallization
Debugging
Electric breakdown
Electronics
Electrostatic discharge
Exact sciences and technology
Integrated circuit layout
Ion implantation
Microelectronic fabrication (materials and surfaces technology)
Oxidation
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Silicides
Stacking
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Summary:In this report, applications of plan-view TEM analyses to IC debugging has been applied to some FA cases, where frequently used tools, such as SEM, FIB, AFM, etc., are not able to reveal the crystalline defects buried in the Si substrate. The novel examples include IC process induced oxidation stacking faults, sidewall profile of shallow trench isolation (STI), aggressive layout design induced active-to-active area breakdown, mask design error induced improper ion implantation, ESD failure induced local bum-out, and metal silicide encroachment.
DOI:10.1109/IPFA.2004.1345530