Fully testable PLA design with minimal extra input

Due to its popular application in the design of LSI/VLSI circuits, testable PLAs have become an important topic. Bozorgui-Nesbat and McCluskey (1986) offered a low-overhead method which adds extra inputs rather than shift registers to design a fully testable PLA. However, to design such a PLA with a...

Full description

Saved in:
Bibliographic Details
Main Authors: Chiou, C.W., Yang, T.C.
Format: Conference Proceeding
Language:English
Subjects:
Application software
Circuit testing
Decoding
Design engineering
Design methodology
Large scale integration
Logic testing
Programmable logic arrays
Shift registers
Switches
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:Due to its popular application in the design of LSI/VLSI circuits, testable PLAs have become an important topic. Bozorgui-Nesbat and McCluskey (1986) offered a low-overhead method which adds extra inputs rather than shift registers to design a fully testable PLA. However, to design such a PLA with a minimal number of extra inputs is an NP complete problem. A rule to modify an arbitrary irredundant PLA which needs fewer extra inputs than other existing methods to make the modified PLA fully testable is presented. It covers multiple stuck-at faults, multiple extra devices, and multiple missing devices, except multiple redundant extra devices in the OR plane of a PLA. In addition, the aforementioned problem is shown no longer NP complete for the modified PLA.< >
DOI:10.1109/EDAC.1990.136723