An improved algorithm-driven methodology to optimize switched current memory cells by transistor sizing

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Bibliographic Details
Main Authors: Fakhfakh, M., Loulou, M., Masmoudi, N.
Format: Conference Proceeding
Language:English
Subjects:
Algorithm design and analysis
Capacitance
Circuits
CMOS process
Design automation
Design methodology
Design optimization
Optimization methods
Switches
Voltage
Online Access:Request full text
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DOI:10.1109/ICEEC.2004.1374569