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Multifunction subthreshold gate used for a low power full adder

This paper presents a full-adder based on realtime reconfigurable CMOS perceptron circuits operating in subthreshold. The Perceptron is based on three output wired inverters that is configured through well biasing. The full-adder is demonstrated by simulations for a 0.12 um CMOS process. Functionali...

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Bibliographic Details
Main Authors: Aunet, S., Oelmann, B., Lande, T.S., Berg, Y.
Format: Conference Proceeding
Language:English
Subjects:
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Summary:This paper presents a full-adder based on realtime reconfigurable CMOS perceptron circuits operating in subthreshold. The Perceptron is based on three output wired inverters that is configured through well biasing. The full-adder is demonstrated by simulations for a 0.12 um CMOS process. Functionality is proven for 200-400 mV power supply voltages. Minimum power consumption is 7.4 nW and power-delay-product 7.8 fJ, for a V dd of 200 mV, according to simulations.
DOI:10.1109/NORCHP.2004.1423818