Novel /spl mu/-power log-domain integrators

This paper introduces novel CMOS bulk driven log-domain integrators using the CMOSP 0.18-/spl mu/m process. The proposed design technique is based on the incomplete translinear loop (ITL). The integrators' unique function is to cancel the slope factor n, which in turn results in: (1) reducing t...

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Bibliographic Details
Main Authors: Aly-Mekawi, W., El-Masry, E.I.
Format: Conference Proceeding
Language:English
Subjects:
Circuit synthesis
Circuit topology
CMOS technology
Dynamic range
Energy consumption
Filtering
Low pass filters
MOSFET circuits
Transconductance
Voltage
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Summary:This paper introduces novel CMOS bulk driven log-domain integrators using the CMOSP 0.18-/spl mu/m process. The proposed design technique is based on the incomplete translinear loop (ITL). The integrators' unique function is to cancel the slope factor n, which in turn results in: (1) reducing the biasing current, (2) reducing the power consumption, and (3) better time constant tenability. As an application, the integrators are used to design a 4th-order Chebyshev low-pass filter that can be tuned from 100 Hz to 10 MHz. The filter is biased by 300 nA, which corresponds to a tuned cut-off frequency of 1 MHz. The supply voltage is 1.8 V and the dynamic range is 50 dB for a PMOS prototype at THD 1%. The power consumption is 0.945 /spl mu/W per pole.
ISSN:0271-4302
2158-1525
DOI:10.1109/ISCAS.2005.1464991