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CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table [image coding example]
Huffman coding is probably the best known and most widely used data compression technique. Nevertheless, the task of further decreased compression ratio through Huffman code up-dating in real-time is still a largely unsolved problem. In this paper, a novel architecture for CAM (content addressable m...
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creator | Kumaki, T. Kuroda, Y. Koide, T. Mattausch, H.J. Noda, H. Dosaka, K. Arimoto, K. Saito, K. |
description | Huffman coding is probably the best known and most widely used data compression technique. Nevertheless, the task of further decreased compression ratio through Huffman code up-dating in real-time is still a largely unsolved problem. In this paper, a novel architecture for CAM (content addressable memory)-based Huffman coding with real-time optimization of the code word table, called CHRC, is proposed. A CAM is exploited to implement fast Huffman encoding, and simultaneously the code word table is reconstructed and up-dated in realtime. The effectiveness of the proposed architecture is verified by structure, encoding flow and simulation results. The example of a JPEG application shows that our proposed CHRC method is able to achieve up to 40% smaller encoded picture sizes, and 6 times smaller clock cycle number for the encoding hardware than conventional Huffman coding methods. |
doi_str_mv | 10.1109/ISCAS.2005.1465807 |
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fullrecord | <record><control><sourceid>ieee_CHZPO</sourceid><recordid>TN_cdi_ieee_primary_1465807</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1465807</ieee_id><sourcerecordid>1465807</sourcerecordid><originalsourceid>FETCH-LOGICAL-i175t-aed5f4acf8a20d35e255628a995087930c8b13e6077a0b30246f588236531a23</originalsourceid><addsrcrecordid>eNo1UNtKw0AUXLyAofYH9GV_IHUvOdnNYwlqCxUfWnwRKSfJ2XYlaUqypdWvN2Kdl4FhGGaGsTspJlKK7GG-zKfLiRICJjJJwQpzwSIlwcYSFFyycWYGzQptrU7gikVCGRknWqgbNu77TzEgAW1UGrFTPn2JC-yp4m-L5ZxjV259oDIcOuKu7fjs4FyDO162ld9t-NGHLe8I6zj4hni7H8h_Y_DtjreOhy39Ookf267iAYua-LtvcEP_AXTCZl_Txy27dlj3ND7ziK2eHlf5LF68Ps_z6SL20kCIkSpwCZbOohKVBlIAqbKYZSCsybQobSE1pcIYFMUwMUkdWKt0Clqi0iN2_xfriWi974Yu3df6fJv-AWYvXrk</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table [image coding example]</title><source>IEEE Xplore All Conference Series</source><creator>Kumaki, T. ; Kuroda, Y. ; Koide, T. ; Mattausch, H.J. ; Noda, H. ; Dosaka, K. ; Arimoto, K. ; Saito, K.</creator><creatorcontrib>Kumaki, T. ; Kuroda, Y. ; Koide, T. ; Mattausch, H.J. ; Noda, H. ; Dosaka, K. ; Arimoto, K. ; Saito, K.</creatorcontrib><description>Huffman coding is probably the best known and most widely used data compression technique. Nevertheless, the task of further decreased compression ratio through Huffman code up-dating in real-time is still a largely unsolved problem. In this paper, a novel architecture for CAM (content addressable memory)-based Huffman coding with real-time optimization of the code word table, called CHRC, is proposed. A CAM is exploited to implement fast Huffman encoding, and simultaneously the code word table is reconstructed and up-dated in realtime. The effectiveness of the proposed architecture is verified by structure, encoding flow and simulation results. The example of a JPEG application shows that our proposed CHRC method is able to achieve up to 40% smaller encoded picture sizes, and 6 times smaller clock cycle number for the encoding hardware than conventional Huffman coding methods.</description><identifier>ISSN: 0271-4302</identifier><identifier>ISBN: 9780780388345</identifier><identifier>ISBN: 0780388348</identifier><identifier>EISSN: 2158-1525</identifier><identifier>DOI: 10.1109/ISCAS.2005.1465807</identifier><language>eng</language><publisher>IEEE</publisher><subject>CADCAM ; Clocks ; Computer aided manufacturing ; Data compression ; Encoding ; Hardware ; Huffman coding ; Image coding ; Image reconstruction ; Very large scale integration</subject><ispartof>2005 IEEE International Symposium on Circuits and Systems (ISCAS), 2005, p.5202-5205 Vol. 5</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1465807$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,4050,4051,27925,54555,54920,54932</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1465807$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Kumaki, T.</creatorcontrib><creatorcontrib>Kuroda, Y.</creatorcontrib><creatorcontrib>Koide, T.</creatorcontrib><creatorcontrib>Mattausch, H.J.</creatorcontrib><creatorcontrib>Noda, H.</creatorcontrib><creatorcontrib>Dosaka, K.</creatorcontrib><creatorcontrib>Arimoto, K.</creatorcontrib><creatorcontrib>Saito, K.</creatorcontrib><title>CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table [image coding example]</title><title>2005 IEEE International Symposium on Circuits and Systems (ISCAS)</title><addtitle>ISCAS</addtitle><description>Huffman coding is probably the best known and most widely used data compression technique. Nevertheless, the task of further decreased compression ratio through Huffman code up-dating in real-time is still a largely unsolved problem. In this paper, a novel architecture for CAM (content addressable memory)-based Huffman coding with real-time optimization of the code word table, called CHRC, is proposed. A CAM is exploited to implement fast Huffman encoding, and simultaneously the code word table is reconstructed and up-dated in realtime. The effectiveness of the proposed architecture is verified by structure, encoding flow and simulation results. The example of a JPEG application shows that our proposed CHRC method is able to achieve up to 40% smaller encoded picture sizes, and 6 times smaller clock cycle number for the encoding hardware than conventional Huffman coding methods.</description><subject>CADCAM</subject><subject>Clocks</subject><subject>Computer aided manufacturing</subject><subject>Data compression</subject><subject>Encoding</subject><subject>Hardware</subject><subject>Huffman coding</subject><subject>Image coding</subject><subject>Image reconstruction</subject><subject>Very large scale integration</subject><issn>0271-4302</issn><issn>2158-1525</issn><isbn>9780780388345</isbn><isbn>0780388348</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2005</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNo1UNtKw0AUXLyAofYH9GV_IHUvOdnNYwlqCxUfWnwRKSfJ2XYlaUqypdWvN2Kdl4FhGGaGsTspJlKK7GG-zKfLiRICJjJJwQpzwSIlwcYSFFyycWYGzQptrU7gikVCGRknWqgbNu77TzEgAW1UGrFTPn2JC-yp4m-L5ZxjV259oDIcOuKu7fjs4FyDO162ld9t-NGHLe8I6zj4hni7H8h_Y_DtjreOhy39Ookf267iAYua-LtvcEP_AXTCZl_Txy27dlj3ND7ziK2eHlf5LF68Ps_z6SL20kCIkSpwCZbOohKVBlIAqbKYZSCsybQobSE1pcIYFMUwMUkdWKt0Clqi0iN2_xfriWi974Yu3df6fJv-AWYvXrk</recordid><startdate>2005</startdate><enddate>2005</enddate><creator>Kumaki, T.</creator><creator>Kuroda, Y.</creator><creator>Koide, T.</creator><creator>Mattausch, H.J.</creator><creator>Noda, H.</creator><creator>Dosaka, K.</creator><creator>Arimoto, K.</creator><creator>Saito, K.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>2005</creationdate><title>CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table [image coding example]</title><author>Kumaki, T. ; Kuroda, Y. ; Koide, T. ; Mattausch, H.J. ; Noda, H. ; Dosaka, K. ; Arimoto, K. ; Saito, K.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-aed5f4acf8a20d35e255628a995087930c8b13e6077a0b30246f588236531a23</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2005</creationdate><topic>CADCAM</topic><topic>Clocks</topic><topic>Computer aided manufacturing</topic><topic>Data compression</topic><topic>Encoding</topic><topic>Hardware</topic><topic>Huffman coding</topic><topic>Image coding</topic><topic>Image reconstruction</topic><topic>Very large scale integration</topic><toplevel>online_resources</toplevel><creatorcontrib>Kumaki, T.</creatorcontrib><creatorcontrib>Kuroda, Y.</creatorcontrib><creatorcontrib>Koide, T.</creatorcontrib><creatorcontrib>Mattausch, H.J.</creatorcontrib><creatorcontrib>Noda, H.</creatorcontrib><creatorcontrib>Dosaka, K.</creatorcontrib><creatorcontrib>Arimoto, K.</creatorcontrib><creatorcontrib>Saito, K.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Xplore</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kumaki, T.</au><au>Kuroda, Y.</au><au>Koide, T.</au><au>Mattausch, H.J.</au><au>Noda, H.</au><au>Dosaka, K.</au><au>Arimoto, K.</au><au>Saito, K.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table [image coding example]</atitle><btitle>2005 IEEE International Symposium on Circuits and Systems (ISCAS)</btitle><stitle>ISCAS</stitle><date>2005</date><risdate>2005</risdate><spage>5202</spage><epage>5205 Vol. 5</epage><pages>5202-5205 Vol. 5</pages><issn>0271-4302</issn><eissn>2158-1525</eissn><isbn>9780780388345</isbn><isbn>0780388348</isbn><abstract>Huffman coding is probably the best known and most widely used data compression technique. Nevertheless, the task of further decreased compression ratio through Huffman code up-dating in real-time is still a largely unsolved problem. In this paper, a novel architecture for CAM (content addressable memory)-based Huffman coding with real-time optimization of the code word table, called CHRC, is proposed. A CAM is exploited to implement fast Huffman encoding, and simultaneously the code word table is reconstructed and up-dated in realtime. The effectiveness of the proposed architecture is verified by structure, encoding flow and simulation results. The example of a JPEG application shows that our proposed CHRC method is able to achieve up to 40% smaller encoded picture sizes, and 6 times smaller clock cycle number for the encoding hardware than conventional Huffman coding methods.</abstract><pub>IEEE</pub><doi>10.1109/ISCAS.2005.1465807</doi></addata></record> |
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subjects | CADCAM Clocks Computer aided manufacturing Data compression Encoding Hardware Huffman coding Image coding Image reconstruction Very large scale integration |
title | CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table [image coding example] |
url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-07T15%3A19%3A30IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_CHZPO&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=CAM-based%20VLSI%20architecture%20for%20Huffman%20coding%20with%20real-time%20optimization%20of%20the%20code%20word%20table%20%5Bimage%20coding%20example%5D&rft.btitle=2005%20IEEE%20International%20Symposium%20on%20Circuits%20and%20Systems%20(ISCAS)&rft.au=Kumaki,%20T.&rft.date=2005&rft.spage=5202&rft.epage=5205%20Vol.%205&rft.pages=5202-5205%20Vol.%205&rft.issn=0271-4302&rft.eissn=2158-1525&rft.isbn=9780780388345&rft.isbn_list=0780388348&rft_id=info:doi/10.1109/ISCAS.2005.1465807&rft_dat=%3Cieee_CHZPO%3E1465807%3C/ieee_CHZPO%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i175t-aed5f4acf8a20d35e255628a995087930c8b13e6077a0b30246f588236531a23%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=1465807&rfr_iscdi=true |