A high-speed low-power Hi-CMOS 4K static RAM

A high-speed low-power CMOS fully static, 4096 word by 1 bit random-access memory (RAM) has been developed, which contains a bipolar-CMOS (BCMOS) circuit on the same chip. The device is realized using low-power-oriented circuit design and high-performance CMOS technology utilizing 3-µm gate length....

Full description

Saved in:
Bibliographic Details
Published in:IEEE transactions on electron devices 1979-06, Vol.26 (6), p.882-885
Main Authors: Minato, O., Masuhara, T., Sasaki, T., Sakai, Y., Kubo, M., Uchibori, K., Yasui, T.
Format: Article
Language:English
Citations: Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:A high-speed low-power CMOS fully static, 4096 word by 1 bit random-access memory (RAM) has been developed, which contains a bipolar-CMOS (BCMOS) circuit on the same chip. The device is realized using low-power-oriented circuit design and high-performance CMOS technology utilizing 3-µm gate length. The fabricated 4K static RAM has an address access time of 43 ns and a power dissipation of 80 mW.
ISSN:0018-9383
1557-9646
DOI:10.1109/T-ED.1979.19513