A miniature low-insertion-loss, high-power CMOS SPDT switch using floating-body technique for 2.4- and 5.8-GHz applications

A low insertion loss SPDT switch in a standard 0.18-/spl mu/m CMOS process was developed for 2.4- and 5.8-GHz WLAN applications. In order to reduce the insertion loss and increase the P/sub 1dB/, the floating-body circuit topology is proposed. The series-shunt switch achieves a measured P/sub 1dB/ o...

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Bibliographic Details
Main Authors: Mei-Chao Yeh, Ren-Chieh Liu, Zuo-Min Tsai, Wang, Huei
Format: Conference Proceeding
Language:English
Subjects:
CMOS process
CMOS technology
Communication switching
Insertion loss
Loss measurement
Performance loss
Radio frequency
Semiconductor device measurement
Substrates
Switches
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Summary:A low insertion loss SPDT switch in a standard 0.18-/spl mu/m CMOS process was developed for 2.4- and 5.8-GHz WLAN applications. In order to reduce the insertion loss and increase the P/sub 1dB/, the floating-body circuit topology is proposed. The series-shunt switch achieves a measured P/sub 1dB/ of 20 dBm, an insertion loss of 1.1 dB, and an isolation of 27 dB at 5.8 GHz. It also achieves a measured insertion loss of 0.65 dB and an isolation of 35 dB at 2.4 GHz. The effective chip size is only 0.03 mm/sup 2/. The measured data agree well with the simulation results. This work presents low insertion loss, high isolation and good power performance with the smallest chip size compared to previously reported 2.4- and 5.8-GHz CMOS switches.
ISSN:1529-2517
2375-0995
DOI:10.1109/RFIC.2005.1489840