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A 6.25Gb/s binary adaptive DFE with first post-cursor tap cancellation for serial backplane communications

A 6.25 Gb/s serial receiver with a 4-tap adaptive DFE is implemented in a 0.13 /spl mu/m 7LM CMOS process. Direct cancellation of the first post-cursor ISI is achieved, enabling recovery of a data eye fully closed from channel losses and crosstalk. A BER

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Bibliographic Details
Main Authors: Payne, R., Bhakta, B., Ramaswamy, S., Song Wu, Powers, J., Landman, P., Erdogan, U., Ah-Lyan Yee, Gu, R., Lin Wu, Yiqun Xie, Parthasarathy, B., Brouse, K., Mohammed, W., Heragu, K., Gupta, V., Dyson, L., Wai Lee
Format: Conference Proceeding
Language:English
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Summary:A 6.25 Gb/s serial receiver with a 4-tap adaptive DFE is implemented in a 0.13 /spl mu/m 7LM CMOS process. Direct cancellation of the first post-cursor ISI is achieved, enabling recovery of a data eye fully closed from channel losses and crosstalk. A BER
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2005.1493872