BEOL process integration with Cu/SiCOH (k=2.8) low-k interconnects at 65 nm groundrules

This paper describes a comprehensive characterization of a 65 nm, 300 mm wafer size interconnect technology with SiCOH material (k=2.8). Excellent film properties of the SiCOH material and precise process optimization enable the minimization of layer damage during etching and strip processes. 3D mod...

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Bibliographic Details
Main Authors: Fukasawa, M., Lane, S., Angyal, M., Chanda, K., Chen, F., Christiansen, C., Fitzsimmons, J., Gill, J., Ida, K., Inoue, K., Kumar, K., Li, B., McLaughlin, P., Melville, I., Minami, M., Nguyen, S., Penny, C., Sakamoto, A., Shimooka, Y., Ono, M., McHerron, D., Nogami, T., Ivers, T.
Format: Conference Proceeding
Language:English
Subjects:
Adhesives
Bonding
Etching
LAN interconnection
Microelectronics
Oxygen
Semiconductor materials
Strips
Thermal stresses
Wiring
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Summary:This paper describes a comprehensive characterization of a 65 nm, 300 mm wafer size interconnect technology with SiCOH material (k=2.8). Excellent film properties of the SiCOH material and precise process optimization enable the minimization of layer damage during etching and strip processes. 3D modeling reveals that the k-value of the SiCOH material was maintained at its initial value after the integration. Electrical yield, reliability and chip-to-package (CPI) evaluation are also presented. The results were comparable with the conventional SiCOH integration scheme.
ISSN:2380-632X
2380-6338
DOI:10.1109/IITC.2005.1499904