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Novel packaging of parallel-optical interconnects for high-end servers

A novel packaging concept is demonstrated where parallel-optical subassemblies are mounted on the same substrate as processor chips for processor-to-processor communication within a high-end server. A single-channel bit-error ratio

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Main Authors: Rosenau, S.A., Simon, J., Windover, L.A.B., Law, B., Flower, G.M., DeGroot, E., Grot, A., Nystrom, M.J., Chao-Kun Lin, Tandon, A., Djordjev, K., Tan, M.R.T., Mirkarimi, L.W., Gruhlke, R.W., Hui Xia, Rankin, G., Ali, M.E., Lemoff, B.E., Giboney, K.S., Dolfi, D.W., Colgan, E.G., Furman, B., Magerlein, J., Schaub, J., Stigliani, D., Torok, J., Becker, D., Katopis, G., Dyckman, W., O'Connor, D.
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Language:English
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container_start_page 3 pp. Vol. 4
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creator Rosenau, S.A.
Simon, J.
Windover, L.A.B.
Law, B.
Flower, G.M.
DeGroot, E.
Grot, A.
Nystrom, M.J.
Chao-Kun Lin
Tandon, A.
Djordjev, K.
Tan, M.R.T.
Mirkarimi, L.W.
Gruhlke, R.W.
Hui Xia
Rankin, G.
Ali, M.E.
Lemoff, B.E.
Giboney, K.S.
Dolfi, D.W.
Colgan, E.G.
Furman, B.
Magerlein, J.
Schaub, J.
Stigliani, D.
Torok, J.
Becker, D.
Katopis, G.
Dyckman, W.
O'Connor, D.
description A novel packaging concept is demonstrated where parallel-optical subassemblies are mounted on the same substrate as processor chips for processor-to-processor communication within a high-end server. A single-channel bit-error ratio
doi_str_mv 10.1109/OFC.2005.193028
format conference_proceeding
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Aggregates
Bandwidth
Connectors
Design optimization
Integrated circuit interconnections
Laboratories
Open source hardware
Optical interconnections
Packaging
Routing
title Novel packaging of parallel-optical interconnects for high-end servers
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