VLSI implementation of a wide band, high dynamic range digital drop receiver

The authors discuss the VLSI implementation of a wideband high-dynamic-range digital drop receiver (DDR) in a three-chip set. The chip set is composed of one numerically controlled oscillator/modulator (NCOM) followed by two decimating digital filters (DDFs). A 16 bit real or 32 bit complex sampled...

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Bibliographic Details
Main Authors: Chester, D.B., Riley, C.A., Damerow, D.H., Olmstead, C.
Format: Conference Proceeding
Language:English
Subjects:
Band pass filters
Baseband
Digital filters
Dynamic range
Low pass filters
Narrowband
Signal analysis
Signal generators
Very large scale integration
Wideband
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Summary:The authors discuss the VLSI implementation of a wideband high-dynamic-range digital drop receiver (DDR) in a three-chip set. The chip set is composed of one numerically controlled oscillator/modulator (NCOM) followed by two decimating digital filters (DDFs). A 16 bit real or 32 bit complex sampled data sequence is input into the NCOM at up to 33 megasamples per second. The NCOM performs a tunable complex down-conversion with greater than 90 dB of spurious-free dynamic range and 0.007 Hz accuracy. The real and imaginary output of the NCOM are each sent to a DDF where they are low-pass-filtered with a stop-band attenuation of up to 120 dB and decimated by up to a factor of 16384. The filter characteristics are fully programmable.< >
ISSN:1520-6149
2379-190X
DOI:10.1109/ICASSP.1991.150571