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Interface trap passivation effect in NBTI measurement for p-MOSFET with SiON gate dielectric

New findings of interface trap passivation effect in negative bias temperature instability (NBTI) measurement for p-MOSFETs with SiON gate dielectric are reported. We show evidence to clarify the recent debate: the recovery of V/sub th/ shift in the passivation phase of the dynamic NBTI is mainly du...

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Bibliographic Details
Published in:IEEE electron device letters 2005-10, Vol.26 (10), p.758-760
Main Authors: Yang, T., Shen, C., Li, M.F., Ang, C.H., Zhu, C.X., Yeo, Y.-C., Samudra, G., Kwong, D.-L.
Format: Article
Language:English
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Summary:New findings of interface trap passivation effect in negative bias temperature instability (NBTI) measurement for p-MOSFETs with SiON gate dielectric are reported. We show evidence to clarify the recent debate: the recovery of V/sub th/ shift in the passivation phase of the dynamic NBTI is mainly due to passivation of interface traps (N/sub it/), not due to hole de-trapping in dielectric hole traps (N/sub ot/). The conventional interface trap measurement methods, dc capacitance-voltage and charge pumping, seriously underestimate the trap density N/sub it/. This underestimation is gate bias dependent during measurement, because of the accelerated interface trap passivation under positive gate bias. Due to this new finding, many of previous reliability studies of p-MOSFETs should be re-investigated.
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2005.855419