Study of cycle time caused by lot arrival distribution in a semiconductor manufacturing line

Recently, competitive semiconductor manufacturing has been indispensable to satisfy market requirements for cycle time, throughput, and cost. Specially, in a large size fab like a mega-fab, precise cycle time control of individual lots is necessary. We studied the mechanism of cycle time caused by l...

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Bibliographic Details
Main Authors: Inoue, T., Ishii, Y., Igarashi, K., Muneta, T., Imaoka, K.
Format: Conference Proceeding
Language:English
Subjects:
Costs
Etching
Gaussian distribution
Histograms
Inspection
Lithography
Production
Semiconductor device manufacture
Size control
Throughput
Online Access:Request full text
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Summary:Recently, competitive semiconductor manufacturing has been indispensable to satisfy market requirements for cycle time, throughput, and cost. Specially, in a large size fab like a mega-fab, precise cycle time control of individual lots is necessary. We studied the mechanism of cycle time caused by lot arrival distribution in a large size fab and found that the lot arrival is approximated to be a Poisson distribution in some conditions because of multi functional inspections. We also found that a factor of excess tool capacity over production capacity is dominant for cycle time by using simulation. As a result, meaningful parameters are obtained to maintain a targeted cycle time
ISSN:1523-553X
DOI:10.1109/ISSM.2005.1513311