Design and modelling of a III/V mobile-gate with optical input on a silicon substrate

The co-integration of III/V devices such as InGaAsP PIN diode and an (In)AlAs/In(Ga)As Resonant Tunnelling Diodes with state-of-the-art silicon NMOS transistors is studied. The III/V devices layers are epitaxially grown and fabricated on silicon substrates for the extraction of model parameters. The...

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Main Authors: Prost, W., Kelly, P., Guttzeit, A., Khorenko, V., Khorenko, E., Matiss, A., Driesen, J., Mofor, A.-C., Bakin, A., Poloczek, A., Neumann, S., Stohr, A., Jager, D., McGinnity, M., Schlachetzki, A., Tegude, F.-J.
Format: Conference Proceeding
Language:English
Subjects:
Circuits
HEMTs
MODFETs
Optical design
Optical modulation
Optical receivers
Schottky diodes
Semiconductor diodes
Silicon
Substrates
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Summary:The co-integration of III/V devices such as InGaAsP PIN diode and an (In)AlAs/In(Ga)As Resonant Tunnelling Diodes with state-of-the-art silicon NMOS transistors is studied. The III/V devices layers are epitaxially grown and fabricated on silicon substrates for the extraction of model parameters. The performance of a potentially low-cost optical receiver circuit on silicon is simulated using HSPICE up to 10 Gb/s.
ISSN:1092-8669
DOI:10.1109/ICIPRM.2005.1517408