Towards a unified top-down design flow for fully differential logic blocks with improved speed and noise immunity

A new top-down design flow (RTL-to-GDSII) is proposed for achieving high-performance and noise-immune designs consisting of differential logic blocks. The differential building blocks are based on the current-mode logic (CML), which offers true differentiality with low-swing signalling, switching-in...

Full description

Saved in:
Bibliographic Details
Main Authors: Hatirnaz, I., Badel, S., Leblebici, Y.
Format: Conference Proceeding
Language:English
Subjects:
Costs
Electronic design automation and methodology
Field programmable gate arrays
Integrated circuit interconnections
Libraries
Logic design
Microelectronics
Noise cancellation
Signal design
Time to market
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:A new top-down design flow (RTL-to-GDSII) is proposed for achieving high-performance and noise-immune designs consisting of differential logic blocks. The differential building blocks are based on the current-mode logic (CML), which offers true differentiality with low-swing signalling, switching-independent constant power dissipation and very high-speed operation. The goal of this flow is to allow effective cancellation of inductive and capacitive noise in high-speed on-chip interconnect lines using a simple generic interconnect architecture.
DOI:10.1109/RME.2005.1543010