A 0.65V CMOS power amplifier for biotelemetry applications

In order to reduce the power consumption in biomedical implantable electronic systems, there is a major demand on reducing the supply voltage. This paper presents a fully integrated, 650 MHz class-E power amplifier (PA), with a class-F driver stage that is suitable for low-voltage operation. The cir...

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Bibliographic Details
Main Authors: El-Desouki, M.M., Deen, M.J., Haddara, Y.M.
Format: Conference Proceeding
Language:English
Subjects:
Biomedical telemetry
Circuit testing
CMOS technology
Driver circuits
Energy consumption
Implants
Integrated circuit technology
Operational amplifiers
Power amplifiers
Voltage
Online Access:Request full text
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Summary:In order to reduce the power consumption in biomedical implantable electronic systems, there is a major demand on reducing the supply voltage. This paper presents a fully integrated, 650 MHz class-E power amplifier (PA), with a class-F driver stage that is suitable for low-voltage operation. The circuit was fabricated in a standard 0.18 mum CMOS technology. Measurement results show a maximum drain efficiency of 15% and a maximum gain of 11.5 dB. When operated from a 0.65 V supply, the PA delivers an output power of 750 muW with a maximum power-added efficiency (PAE) of 10%. The circuit also has a second output to test the effects of using an on-chip filter in low-power designs. This work demonstrates the feasibility of using class-E PAs for short-range, low-power applications
ISSN:0840-7789
2576-7046
DOI:10.1109/CCECE.2005.1557204