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Low cost CPU I/O analyzer under system conditions

This paper describes new methodology of component I/O testing under system conditions, enabling analog validation of modem buses without the need for full system functionality. The inexpensive implementation is appropriate for chips with IBIST-DFT functionality.

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Main Authors: Zobin, G., Sotman, M., Kostinsky, A.
Format: Conference Proceeding
Language:English
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creator Zobin, G.
Sotman, M.
Kostinsky, A.
description This paper describes new methodology of component I/O testing under system conditions, enabling analog validation of modem buses without the need for full system functionality. The inexpensive implementation is appropriate for chips with IBIST-DFT functionality.
doi_str_mv 10.1109/EPEP.2005.1563693
format conference_proceeding
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identifier ISSN: 2165-4107
ispartof IEEE 14th Topical Meeting on Electrical Performance of Electronic Packaging, 2005, 2005, p.33-36
issn 2165-4107
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Clocks
Costs
Design for testability
Frequency
Low voltage
Modems
Operating systems
System testing
Vehicles
Voltage control
title Low cost CPU I/O analyzer under system conditions
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