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Microprocessor silicon debug based on failure propagation tracing
As the complexity of microprocessors increases, the design and bring-up times have significantly increased, negatively impacting the time-to-market (TTM) requirements. In this paper, a backtracing methodology for identifying the root cause of functional failures on the UltraSPARCtrade family of proc...
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creator | Caty, O. Dahlgren, P. Bayraktaroglu, I. |
description | As the complexity of microprocessors increases, the design and bring-up times have significantly increased, negatively impacting the time-to-market (TTM) requirements. In this paper, a backtracing methodology for identifying the root cause of functional failures on the UltraSPARCtrade family of processors is presented. Data provided by a scan dump analysis methodology is linked not only to the design database but also to the failing test in order to isolate one or several candidates for further analysis |
doi_str_mv | 10.1109/TEST.2005.1583986 |
format | conference_proceeding |
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In this paper, a backtracing methodology for identifying the root cause of functional failures on the UltraSPARCtrade family of processors is presented. Data provided by a scan dump analysis methodology is linked not only to the design database but also to the failing test in order to isolate one or several candidates for further analysis</abstract><pub>IEEE</pub><doi>10.1109/TEST.2005.1583986</doi></addata></record> |
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language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Clocks Frequency Logic devices Logic testing Manufacturing Microprocessors Silicon Sun Timing Voltage |
title | Microprocessor silicon debug based on failure propagation tracing |
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