THEMIS Logic Simulator - A Mix Mode, Multi-Level, Hierarchical, Interactive Digital Circuit Simulator

A new logic simulator called THEMIS (TM) Logic Simulator for the design of LSI, VLSI and PCBs is described. THEMIS supports design verification and test development from initial specification in behavioral and RTL languages to analysis of the final layout at the gate and switch level. To allow the s...

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Bibliographic Details
Main Authors: Doshi, M.H., Sullivan, R.B., Schuler, D.M.
Format: Conference Proceeding
Language:English
Subjects:
Circuit simulation
Circuit testing
Design engineering
Digital circuits
Hardware
Large scale integration
Logic circuits
Logic design
Switches
Very large scale integration
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Description
Summary:A new logic simulator called THEMIS (TM) Logic Simulator for the design of LSI, VLSI and PCBs is described. THEMIS supports design verification and test development from initial specification in behavioral and RTL languages to analysis of the final layout at the gate and switch level. To allow the simulation of an entire system or check the correctness of a single circuit, the different modeling techniques can be easily intermixed. THEMIS is a highly interactive simulator that minimizes a hardware engineer's time and effort to debug logic. This paper gives an overview of THEMIS and its use by design engineers.
ISSN:0738-100X
DOI:10.1109/DAC.1984.1585768