A GaAs MESFET with a partially depleted p layer for SRAM applications

A GaAs MESFET with a partially depleted p layer that has a specific application to SRAMs has been developed. The short-channel effect is well suppressed for gate lengths down to 0.5 mu m by a rather dense p layer buried under the channel. Its acceptor ion dose is as high as 2*10/sup 12/ cm/sup -2/,...

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Bibliographic Details
Published in:IEEE transactions on electron devices 1991-12, Vol.38 (12), p.2590-2598
Main Authors: Noda, M., Hosogi, K., Sumitani, K., Nakano, H., Nishitani, K., Otsubo, M., Makino, H., Tada, A.
Format: Article
Language:English
Subjects:
Applied sciences
Electronics
Exact sciences and technology
FETs
Gallium arsenide
HEMTs
Heterojunction bipolar transistors
Large scale integration
MESFETs
Microscopy
Parasitic capacitance
Random access memory
Scattering
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Transistors
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Summary:A GaAs MESFET with a partially depleted p layer that has a specific application to SRAMs has been developed. The short-channel effect is well suppressed for gate lengths down to 0.5 mu m by a rather dense p layer buried under the channel. Its acceptor ion dose is as high as 2*10/sup 12/ cm/sup -2/, which corresponds to a partially depleted condition. As for applications for SRAMs, it is possible to attain fully functional 7-ns 4-kb SRAMs that are operative at 75 degrees C by using the FET with a 1- mu m gate. A chip yield of 22% has been achieved in a 3-in wafer.< >
ISSN:0018-9383
1557-9646
DOI:10.1109/16.158680