A CMOS Fully Differential Σ - Δ A Frequency Synthesizer for 2-Mb/s GMSK Modulation

A CMOS fully-differential 2.4-GHz Σ-Δ frequency synthesizer for Gaussian Minimum Shift Keying (GMSK) modulation is presented in this paper. The pre-compensation fractional-N PLL is adopted in the modulator. The designed circuits are simulated in a 0.18μm 1P6M CMOS process. The power consumption of t...

Full description

Saved in:
Bibliographic Details
Main Authors: Li Zhang, Jinke Yao, Ende Wu, Baoyong Chi, Zhihua Wang, Hongyi Chen
Format: Conference Proceeding
Language:English
Subjects:
Bandwidth
Circuits
Digital modulation
Energy consumption
Filters
Frequency synthesizers
Phase frequency detector
Phase locked loops
Transfer functions
Voltage-controlled oscillators
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:A CMOS fully-differential 2.4-GHz Σ-Δ frequency synthesizer for Gaussian Minimum Shift Keying (GMSK) modulation is presented in this paper. The pre-compensation fractional-N PLL is adopted in the modulator. The designed circuits are simulated in a 0.18μm 1P6M CMOS process. The power consumption of the PLL is about 11-mW and the data rate of the modulator can get to 2-Mbits/s.
ISSN:2159-1660
DOI:10.1109/ICM.2005.1590026