Simulation of A Monolithically Integrated CMOS Bioamplifier for EEG Recordings

A monolithically integrated CMOS bioamplifier is presented in this paper for EEG recording applications. The capacitive-coupled circuit input structure is utilized to eliminate the large and random DC offsets existing in the electrode-tissue interface. Diode-connected NMOS transistors with negative...

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Bibliographic Details
Main Authors: Sui Xiaohong, Liu Jinbin, Gu Ming, Pei Weihua, Chen Hongda
Format: Conference Proceeding
Language:English
Subjects:
Band pass filters
Brain modeling
Circuit simulation
Diodes
Electroencephalography
Gain
MOSFETs
Passive filters
Resistors
Voltage
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Summary:A monolithically integrated CMOS bioamplifier is presented in this paper for EEG recording applications. The capacitive-coupled circuit input structure is utilized to eliminate the large and random DC offsets existing in the electrode-tissue interface. Diode-connected NMOS transistors with negative voltage between gate and source are candidates for large resistors necessary to the bioamplifier. A passive BEF (Band Eliminator Filter) can reduce 50 Hz noise disturbance strength by more than 60 dB. A novel analysis approach is given to help determine the noise power spectral density. Simulation results show that the two-stage CMOS bioamplifier in a closed-loop capacitive feedback configuration provides an AC in-band gain of 39.6 dB, a DC gain of zero, and an input-referred noise of 87 nVrms integrated from 0.01 Hz to 100 Hz.
DOI:10.1109/EDSSC.2005.1635356