Spatial Memory Streaming

Prior research indicates that there is much spatial variation in applications' memory access patterns. Modern memory systems, however, use small fixed-size cache blocks and as such cannot exploit the variation. Increasing the block size would not only prohibitively increase pin and interconnect...

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Bibliographic Details
Main Authors: Somogyi, Stephen, Wenisch, Thomas F., Ailamaki, Anastassia, Falsafi, Babak, Moshovos, Andreas
Format: Conference Proceeding
Language:English
Subjects:
Application software
Bandwidth
Computer architecture
Data structures
Decision support systems
Delay
Hardware
Hardware > Electronic design automation > High-level and register-transfer level synthesis
Hardware > Integrated circuits > Interconnect
Hardware > Integrated circuits > Semiconductor memory > Dynamic memory
Hardware > Very large scale integration design > VLSI packaging > Input > output styles
Prefetching
System performance
Technological innovation
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Summary:Prior research indicates that there is much spatial variation in applications' memory access patterns. Modern memory systems, however, use small fixed-size cache blocks and as such cannot exploit the variation. Increasing the block size would not only prohibitively increase pin and interconnect bandwidth demands, but also increase the likelihood of false sharing in shared-memory multiprocessors. In this paper, we show that memory accesses in commercial workloads often exhibit repetitive layouts that span large memory regions (e.g., several kB), and these accesses recur in patterns that are predictable through codebased correlation. We propose Spatial Memory Streaming, a practical on-chip hardware technique that identifies codecorrelated spatial access patterns and streams predicted blocks to the primary cache ahead of demand misses. Using cycle-accurate full-system multiprocessor simulation of commercial and scientific applications, we demonstrate that Spatial Memory Streaming can on average predict 58% of L1 and 65% of off-chip misses, for a mean performance improvement of 37% and at best 307%.
ISSN:1063-6897
2575-713X
DOI:10.1109/ISCA.2006.38